公开(公告)号：US20250149454A1

公开(公告)日：2025-05-08

申请号：US18503013

申请日：2023-11-06

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Linda Pei Ee Chua ,  Kai Chong Chan ,  Yaojian Lin

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device has a first interconnect structure. A pre-molded bridge die is disposed over the first interconnect structure. An encapsulant is deposited over the pre-molded bridge die. A second interconnect structure is disposed over the encapsulant and pre-molded bridge die. A first semiconductor die is disposed over the second interconnect structure within a footprint of the pre-molded bridge die. A second semiconductor die is disposed over the second interconnect structure within the footprint of the pre-molded bridge die.

公开(公告)号：US20250087545A1

公开(公告)日：2025-03-13

申请号：US18462612

申请日：2023-09-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Kai Chong Chan ,  Linda Pei Ee Chua ,  Yung Kuan Hsiao ,  Beng Yee Teh’ ,  Jian Zuo ,  Yaojian Lin

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor device has a pre-molded discrete electrical component and a first encapsulant deposited over the pre-molded discrete electrical component. A first conductive layer is formed over the first encapsulant and pre-molded discrete electrical component. An electrical component is disposed over the first conductive layer. A second encapsulant is deposited over the electrical component and first conductive layer. A second conductive layer is formed over the second encapsulant. A conductive pillar is formed between the first conductive layer and second conductive layer through the second encapsulant. The pre-molded discrete electrical component has a discrete component and a third encapsulant deposited around the discrete component. The discrete component has an electrical terminal, a finish formed over the electrical terminal, and a third conductive layer formed over the finish. An interconnect structure formed on the electrical component is oriented toward the first conductive layer or the second conductive layer.

公开(公告)号：US20240379479A1

公开(公告)日：2024-11-14

申请号：US18315098

申请日：2023-05-10

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Linda Pei Ee Chua ,  Ching Meng Fang ,  Hin Hwa Goh

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/00 ,  H01L25/16

Abstract: A semiconductor device includes a plurality of electrical components. A first encapsulant is deposited over the plurality of electrical components to form a module. The module is disposed adjacent to a semiconductor die. A second encapsulant is deposited over the semiconductor die and module. A build-up interconnect structure is formed over the second encapsulant, module, and semiconductor die.

公开(公告)号：US11688612B2

公开(公告)日：2023-06-27

申请号：US15846014

申请日：2017-12-18

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Reza A. Pagaila ,  Yaojian Lin ,  Jun Mo Koo ,  HeeJo Chi

IPC: H01L21/56 ,  H01L21/683 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L25/16 ,  H01L23/552

CPC classification number: H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/81 ,  H01L24/92 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/16 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/0557 ,  H01L2224/05552 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/45015 ,  H01L2224/4816 ,  H01L2224/48091 ,  H01L2224/48157 ,  H01L2224/48158 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/73259 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/81001 ,  H01L2224/812 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/00014 ,  H01L2924/0103 ,  H01L2924/014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/0105 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/157 ,  H01L2924/1532 ,  H01L2924/15151 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/207 ,  H01L2924/3025 ,  H01L2924/30105 ,  H01L2924/3511 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/97 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2224/16225 ,  H01L2924/13091 ,  H01L2924/1306 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/0002 ,  H01L2224/05552 ,  H01L2924/12042 ,  H01L2924/00 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device has an interposer mounted over a carrier. The interposer includes TSV formed either prior to or after mounting to the carrier. An opening is formed in the interposer. The interposer can have two-level stepped portions with a first vertical conduction path through a first stepped portion and second vertical conduction path through a second stepped portion. A first and second semiconductor die are mounted over the interposer. The second die is disposed within the opening of the interposer. A discrete semiconductor component can be mounted over the interposer. A conductive via can be formed through the second die or encapsulant. An encapsulant is deposited over the first and second die and interposer. A portion of the interposer can be removed to that the encapsulant forms around a side of the semiconductor device. An interconnect structure is formed over the interposer and second die.

公开(公告)号：US20230015504A1

公开(公告)日：2023-01-19

申请号：US17935262

申请日：2022-09-26

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Byung Joon Han ,  Il Kwon Shim ,  Yaojian Lin ,  Pandi C. Marimuthu

IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L21/78

Abstract: A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die. Alternatively, the semiconductor device is singulated through a second portion of the base semiconductor and through the encapsulant to remove the second portion of the base semiconductor and encapsulant from the side of the semiconductor die.

公开(公告)号：US11488933B2

公开(公告)日：2022-11-01

申请号：US16918281

申请日：2020-07-01

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Pandi C. Marimuthu ,  Il Kwon Shim ,  Byung Joon Han

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L21/786 ,  H01L21/784 ,  H01L21/782 ,  H01L21/82 ,  H01L21/78

Abstract: A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.

公开(公告)号：US20220289560A1

公开(公告)日：2022-09-15

申请号：US17664789

申请日：2022-05-24

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Won Kyoung Choi ,  Kang Chen ,  Ivan Micallef

IPC: B81B7/00 ,  B81C1/00 ,  H01L21/56 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00

Abstract: A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.

公开(公告)号：US11222793B2

公开(公告)日：2022-01-11

申请号：US16687865

申请日：2019-11-19

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Heinz-Peter Wirtz ,  Seung Wook Yoon ,  Pandi C. Marimuthu

IPC: H01L23/28 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L21/3105

Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die. An insulating layer is formed over the semiconductor wafer. A portion of the insulating layer is removed by LDA to expose a portion of an active surface of the semiconductor die. A first conductive layer is formed over a contact pad on the active surface of the semiconductor die. The semiconductor wafer is singulated to separate the semiconductor die. The semiconductor die is disposed over a carrier with the active surface of the semiconductor die offset from the carrier. An encapsulant is deposited over the semiconductor die and carrier to cover a side of the semiconductor die and the exposed portion of the active surface. An interconnect structure is formed over the first conductive layer. Alternatively, a MUF material is deposited over a side of the semiconductor die and the exposed portion of the active surface.

公开(公告)号：US20210233815A1

公开(公告)日：2021-07-29

申请号：US17231591

申请日：2021-04-15

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Thomas J. Strothmann ,  Damien M. Pricolo ,  Il Kwon Shim ,  Yaojian Lin ,  Heinz-Peter Wirtz ,  Seung Wook Yoon ,  Pandi C. Marimuthu

IPC: H01L21/78 ,  H01L23/28 ,  H01L23/522 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H01L21/683

Abstract: A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first semiconductor die singulated from the first semiconductor wafer. An encapsulant is deposited over and around the first semiconductor die and carrier to form a reconstituted panel. An interconnect structure is formed over the reconstituted panel while leaving the encapsulant devoid of the interconnect structure. The reconstituted panel is singulated through the encapsulant. The first semiconductor die are removed from the carrier. A second semiconductor die with a size different from the size of the first semiconductor die is disposed over the carrier. The fixed size of the carrier is independent of a size of the second semiconductor die.

公开(公告)号：US10790158B2

公开(公告)日：2020-09-29

申请号：US16206108

申请日：2018-11-30

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Yaojian Lin ,  Kang Chen ,  Hin Hwa Goh ,  Il Kwon Shim

IPC: H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/13 ,  H01L23/498 ,  H01L23/538

Abstract: A semiconductor device has a substrate. A conductive via is formed through the substrate. A plurality of first contact pads is formed over a first surface of the substrate. A plurality of second contact pads is formed over a second surface of the substrate. A dummy pattern is formed over the second surface of the substrate. An indentation is formed in a sidewall of the substrate. An opening is formed through the substrate. An encapsulant is deposited in the opening. An insulating layer is formed over second surface of the substrate. A dummy opening is formed in the insulating layer. A semiconductor die is disposed adjacent to the substrate. An encapsulant is deposited over the semiconductor die and substrate. The first surface of the substrate includes a width that is greater than a width of the second surface of the substrate.