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公开(公告)号:US20180260510A1
公开(公告)日:2018-09-13
申请号:US15479271
申请日:2017-04-04
Inventor: Ying-Chiao Wang , Yu-Cheng Tung , Chien-Ting Ho , Li-Wei Feng , Emily SH Huang
IPC: G06F17/50 , H01L27/02 , H01L27/108
CPC classification number: G06F17/5077 , H01L27/0207 , H01L27/10823 , H01L27/10876 , H01L27/10888
Abstract: A method for forming a contact plug layout include following steps. (a) Receiving a plurality of active region patterns and a plurality of buried gate patterns that are parallel with each other, and each active region pattern overlaps two buried gate patterns to form two overlapping regions and one contact plug region in between the two overlapping regions in each active region pattern; and (b) forming a contact plug pattern in each contact plug region, the contact plug pattern respectively includes a parallelogram, and an included angle of the parallelogram is not equal to 90°. The contact plug pattern in each active region pattern partially overlaps the two buried gate pattern, respectively. The step (a) to the step (b) are implemented using a computer.
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公开(公告)号:US10068808B2
公开(公告)日:2018-09-04
申请号:US15294797
申请日:2016-10-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Hon-Huei Liu , Shih-Fang Hong , Jyh-Shyang Jenq
IPC: H01L21/8238 , H01L21/225 , H01L21/324 , H01L27/092 , H01L29/66 , H01L29/78
Abstract: A semiconductor device includes: a fin-shaped structure on a substrate, in which the fin-shaped structure includes a top portion and a bottom portion; a doped layer around the bottom portion of the fin-shaped structure; a first liner on the doped layer, and a second liner on the top portion and the bottom portion of the fin-shaped structure. Preferably, the first liner and the second liner are made of different material.
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公开(公告)号:US10056467B2
公开(公告)日:2018-08-21
申请号:US15196024
申请日:2016-06-28
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chih-Kai Hsu , Jyh-Shyang Jenq
IPC: H01L29/06 , H01L29/66 , H01L21/308 , H01L29/78
CPC classification number: H01L29/66545 , H01L21/3085 , H01L21/823431 , H01L21/845 , H01L27/0886 , H01L27/1211 , H01L29/66795 , H01L29/6681 , H01L29/785
Abstract: A method of forming a semiconductor fin structure is provided. A substrate is provided, which has at least two sub regions and a dummy region disposed therebetween. A recess is disposed in each sub region. A semiconductor layer is formed to fill the recesses. A patterned mask layer is formed on the semiconductor layer in the sub regions and on the substrate in the dummy region. The substrate and the semiconductor layer are removed by using the patterned mask layer as a mask, thereby forming a plurality of fin structures in the sub regions and a plurality of dummy fin structures in the dummy region. The present invention further provides a semiconductor fin structure.
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公开(公告)号:US20180212055A1
公开(公告)日:2018-07-26
申请号:US15872996
申请日:2018-01-17
Inventor: Kai-Ping Chen , Li-Wei Feng , Kuei-Hsuan Yu , Chiu-Hsien Yeh
IPC: H01L29/78 , H01L27/108 , H01L29/423
CPC classification number: H01L29/7827 , H01L27/10823 , H01L27/10876 , H01L27/10888 , H01L27/10891 , H01L29/4236
Abstract: A semiconductor device and a method of forming the same are provided. A substrate is provided. A trench is formed in the substrate and a conductive material is formed filling the trench. A portion of the conductive material filling an upper portion of the trench is removed to expose an upper surface of the substrate and an upper corner and an upper sidewall of the trench. A doping process is performed to form a doped region in the substrate along the exposed upper surface of the substrate and the exposed upper corner and upper sidewall of the trench. The doped region has an upside-down L shape.
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公开(公告)号:US20180211964A1
公开(公告)日:2018-07-26
申请号:US15873909
申请日:2018-01-18
Inventor: Li-Wei Feng , Ying-Chiao Wang , Tzu-Tsen Liu , Tsung-Ying Tsai , Chien-Ting Ho
IPC: H01L27/108 , H01L27/24 , H01L21/764 , H01L21/02
CPC classification number: H01L27/10885 , H01L21/02164 , H01L21/0217 , H01L21/764 , H01L27/10847 , H01L27/249
Abstract: A semiconductor device and method of forming the same, the semiconductor device includes plural bit lines, plural conductive patterns, plural conductive pads and a spacer. The bit lines are disposed on a substrate, along a first direction. The conductive patterns are disposed on the substrate, along the first direction, wherein the conductive patterns and the bit lines are alternately arranged in a second direction perpendicular to the first direction. The conductive pads are arranged in an array and disposed over the conductive patterns and the bit lines. The spacer is disposed between the bit lines and the conductive patterns, under the conductive pads, wherein the spacers includes a tri-layered structure having a first layer, a second layer and a third layer, and the second layer includes a plurality of air gaps separated arranged along the first direction.
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96.
公开(公告)号:US09966468B2
公开(公告)日:2018-05-08
申请号:US15214429
申请日:2016-07-19
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Tien-Chen Chan , Yi-Fan Li , Li-Wei Feng , Ming-Hua Chang , Yu-Shu Lin , Shu-Yen Chan
CPC classification number: H01L29/7851 , H01L21/02164 , H01L21/0217 , H01L29/0649 , H01L29/1054 , H01L29/66795 , H01L29/785
Abstract: A method for fabricating semiconductor device is disclosed. First, a fin-shaped structure is formed on a substrate, a first liner is formed on the substrate and the fin-shaped structure, a second liner is formed on the first liner, part of the second liner and part of the first liner are removed to expose a top surface of the fin-shaped structure, part of the first liner between the fin-shaped structure and the second liner is removed to form a recess, and an epitaxial layer is formed in the recess.
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公开(公告)号:US09947792B2
公开(公告)日:2018-04-17
申请号:US14703904
申请日:2015-05-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Chao-Hung Lin , Chih-Kai Hsu , Yu-Hsiang Hung , Jyh-Shyang Jenq
CPC classification number: H01L29/785 , H01L29/66795 , H01L29/66803
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first fin-shaped structure thereon; forming a spacer adjacent to the first fin-shaped structure; using the spacer as mask to remove part of the substrate for forming a second fin-shaped structure, in which the second fin-shaped structure comprises a top portion and a bottom portion; and forming a doped portion in the bottom portion of the second fin-shaped structure.
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公开(公告)号:US09842760B1
公开(公告)日:2017-12-12
申请号:US15215554
申请日:2016-07-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Tong-Jyun Huang , Shih-Hung Tsai , Jyh-Shyang Jenq , Chun-Yao Yang , Ming-Shiou Hsieh , Rong-Sin Lin
IPC: H01L21/324 , H01L21/762 , H01L29/66 , H01L29/06 , H01L29/78 , H01L21/265
CPC classification number: H01L21/76237 , H01L21/2236 , H01L29/66795 , H01L29/785 , H01L29/7851
Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate having a fin-shaped structure thereon is provided, a spacer is formed adjacent to the fin-shaped structure, and the spacer is used as mask to remove part of the substrate for forming an isolation trench, in which the isolation trench includes two sidewall portions and a bottom portion. Next, a plasma doping process is conducted to implant dopants into the two sidewall portions and the bottom portion of the isolation trench.
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公开(公告)号:US20170338227A1
公开(公告)日:2017-11-23
申请号:US15652223
申请日:2017-07-17
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Tong-Jyun Huang , Shih-Hung Tsai , Jia-Rong Wu , Tien-Chen Chan , Yu-Shu Lin , Jyh-Shyang Jenq
IPC: H01L27/088 , H01L21/8234 , H01L21/311 , H01L29/66 , H01L29/06
Abstract: A semiconductor device includes at least a substrate, fin-shaped structures, a protection layer, epitaxial layers, and a gate electrode. The fin-shaped structures are disposed in a first region and a second region of the substrate. The protection layer conformally covers the surface of the substrate and the sidewalls of fin-shaped structures. The epitaxial layers respectively conformally and directly cover the fin-shaped structures in the first region. The gate electrode covers the fin-shaped structures in the second region, and the protection layer is disposed between the gate electrode and the fin-shaped structures.
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公开(公告)号:US09653603B1
公开(公告)日:2017-05-16
申请号:US15139305
申请日:2016-04-26
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Li-Wei Feng , Shih-Hung Tsai , Yi-Fan Li , Kun-Hsin Chen , Tong-Jyun Huang , Jyh-Shyang Jenq , Nan-Yuan Huang
IPC: H01L29/78 , H01L29/08 , H01L29/161 , H01L29/165 , H01L29/167 , H01L29/06 , H01L21/265 , H01L21/324 , H01L29/66
CPC classification number: H01L29/66795 , H01L21/265 , H01L21/26506 , H01L21/26513 , H01L21/26546 , H01L29/1054 , H01L29/7848 , H01L29/7849 , H01L29/785
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a recess in the substrate; forming a buffer layer in the recess; forming an epitaxial layer on the buffer layer; and removing part of the epitaxial layer, part of the buffer layer, and part of the substrate to form fin-shaped structures.
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