公开(公告)号：US20080047738A1

公开(公告)日：2008-02-28

申请号：US11878787

申请日：2007-07-26

Applicant: Tomoya Kanehira

Inventor： Tomoya Kanehira

IPC: H05K1/03

CPC classification number: H05K1/18 ,  H05K2201/09363 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/1003

Abstract: A printed wiring board is used as a printed circuit board of various kinds of electronic devices, and has a part on which a coil is mounted. A metallic pattern area such as a copper foil is formed in a coil vicinity area including the part on which said at least coil is mounted, on the printed wiring board. The metallic pattern area is divided into plural areas in a direction of a coil current flowing in the coil. Thereby, a loop current is not generated in the same direction as that of the coil current in the metallic pattern area.

Abstract translation: 印刷电路板用作各种电子设备的印刷电路板，并且具有安装有线圈的部分。 在包括安装有至少线圈的部分的线圈附近区域中，在印刷线路板上形成诸如铜箔的金属图案区域。 金属图案区域沿着在线圈中流动的线圈电流的方向分成多个区域。 由此，在与金属图案区域的线圈电流相同的方向上不产生回路电流。

公开(公告)号：US20070216274A1

公开(公告)日：2007-09-20

申请号：US11276901

申请日：2006-03-17

Applicant: John Schultz ,  Nelson O'Bryan

Inventor： John Schultz ,  Nelson O'Bryan

IPC: H01J1/62 ,  H01J7/24

CPC classification number: H05K1/0204 ,  F21K9/00 ,  G02F2001/133628 ,  H01L2224/48091 ,  H01L2224/48471 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/07811 ,  H01L2924/12044 ,  H01L2924/3011 ,  H05K1/0209 ,  H05K1/0373 ,  H05K1/189 ,  H05K3/0061 ,  H05K2201/0209 ,  H05K2201/09318 ,  H05K2201/09363 ,  H05K2201/10106 ,  H05K2203/1189 ,  H01L2924/00 ,  H01L2224/4554

Abstract: Illumination assemblies include a substrate having a first and second electrically conductive layer separated by an electrically insulating layer. The insulating layer includes a polymer material loaded with thermally conductive particles. At least a portion of the thermally conductive particles simultaneously contact both the first and second electrically conductive layers. A plurality of light sources such as LEDs or other miniature light sources are preferably disposed on the first conductive layer.

Abstract translation: 照明组件包括具有由电绝缘层分隔开的第一和第二导电层的衬底。 绝缘层包括装载有导热颗粒的聚合物材料。 至少一部分导热颗粒同时接触第一和第二导电层。 诸如LED或其它微型光源的多个光源优选设置在第一导电层上。

公开(公告)号：US20070212878A1

公开(公告)日：2007-09-13

申请号：US11748257

申请日：2007-05-14

Applicant: Morgan Johnson ,  William Miller

Inventor： Morgan Johnson ,  William Miller

IPC: H01L21/44

CPC classification number: H05K3/027 ,  H05K1/0245 ,  H05K1/025 ,  H05K2201/09363 ,  H05K2201/09727 ,  H05K2203/1476

Abstract: A method of fabricating a conductive line provides a substrate having a blanket layer of conductive material disposed thereon, a removing of a first portion of the blanket layer of conductive material to form one or more gaps that define a first line, the gaps adjacent to the first line, the first line having at least a first segment of a first width and a second segment of a second width, the first and second widths being different, a first increasing of the width of a first gap of the one or more gaps, the first gap adjacent to the first segment, by a first amount, and a second increasing of the width of a second gap of the one or more gaps, the second gap adjacent to the second segment, by a second amount wherein the first and second increasing depend upon a desired electrical characteristic. The first amount and the second amount may be different from each other.

Abstract translation: 一种制造导电线的方法提供了一种具有布置在其上的导电材料的覆盖层的衬底，去除导电材料的覆盖层的第一部分以形成限定第一线的一个或多个间隙， 第一线，第一线具有至少第一宽度的第一段和第二宽度的第二段，第一宽度和第二宽度不同，第一间隙的宽度的第一增加， 与第一段相邻的第一间隙，第一数量，以及与第二段相邻的一个或多个间隙的第二间隙的第二间隙的宽度的第二增加第二数量，其中第一和第二间隙 增加取决于所需的电特性。 第一量和第二量可以彼此不同。

公开(公告)号：US20070126090A1

公开(公告)日：2007-06-07

申请号：US11566892

申请日：2006-12-05

Applicant: Chihiro Sasaki ,  Yasuaki Iwata

Inventor： Chihiro Sasaki ,  Yasuaki Iwata

IPC: H01L23/495

CPC classification number: H01L23/4985 ,  H01L23/3735 ,  H01L2924/0002 ,  H05K1/0209 ,  H05K1/189 ,  H05K2201/09363 ,  H05K2201/09781 ,  H05K2201/10681 ,  H01L2924/00

Abstract: Heat dissipation, is improved, of a semiconductor device on a tape carrier package, in which the number of outputs of the semiconductor device has been increased for implementing a multi-channel configuration and narrower pitches are employed. There are included a tape carrier 20 having lead patterns 21 to 24 formed on a tape base 28 thereof, and a semiconductor device 10 mounted on the tape carrier 20 and having electrode patterns 11 to 14 disposed thereon. The semiconductor device 10 includes heat dissipating electrode patterns 15 to 17 at positions where the heat dissipating electrode patterns 15 to 17 do not interfere with the electrode patterns 11 to 14. The lead patterns 21 to 24 are electrically connected to the corresponding electrode patterns 11 to 14, respectively. On the tape carrier 20, heat dissipation patterns are formed. The heat dissipation patterns are disposed at positions where the heat dissipation patterns do not interfere with the lead patterns 21 to 24 and are also electrically and thermally connected to the corresponding heat dissipating electrode patterns 15 to 17, respectively.

Abstract translation: 为了实现多通道配置而增加半导体器件的输出数量并且采用更窄的间距，在带载封装上的半导体器件的散热得到改善。 包括形成在其基带28上的引线图案21至24的带状载体20和安装在带载体20上并具有设置在其上的电极图案11至14的半导体器件10。 半导体装置10在散热电极图案15〜17与电极图案11〜14不干涉的位置具有散热电极图案15〜17。 引线图案21至24分别电连接到相应的电极图案11至14。 在带载体20上形成散热图案。 散热图案设置在散热图案不与引线图案21至24干涉的位置处，并且还分别与相应的散热电极图案15至17电连接和热连接。

公开(公告)号：US07180315B2

公开(公告)日：2007-02-20

申请号：US11166431

申请日：2005-06-24

Applicant: Bahadir Tunaboylu

Inventor： Bahadir Tunaboylu

IPC: G01R31/02

CPC classification number: H05K3/027 ,  G01R1/07378 ,  G01R31/2889 ,  H05K1/0298 ,  H05K1/092 ,  H05K2201/09363

Abstract: A method of processing a substrate is provided. The method includes providing a substrate having a first surface, a second surface, and conductive paths extending from the first surface to the second surface. The method also includes (1) covering a portion of the first surface with a conductive material, and (2) removing a portion of the conductive material to define conductive traces on the first surface.

Abstract translation: 提供了一种处理衬底的方法。 该方法包括提供具有第一表面，第二表面和从第一表面延伸到第二表面的导电路径的基底。 该方法还包括（1）用导电材料覆盖第一表面的一部分，以及（2）去除导电材料的一部分以在第一表面上限定导电迹线。

公开(公告)号：US07132366B2

公开(公告)日：2006-11-07

申请号：US11216959

申请日：2005-08-31

Applicant: Warren M. Farnworth ,  Alan G. Wood

Inventor： Warren M. Farnworth ,  Alan G. Wood

IPC: H01L21/44

CPC classification number: H01L23/3128 ,  G01R1/0483 ,  G01R3/00 ,  G01R31/2867 ,  H01L21/4846 ,  H01L23/32 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/48 ,  H01L24/49 ,  H01L24/72 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/3011 ,  H01L2924/30111 ,  H05K1/0218 ,  H05K1/113 ,  H05K3/027 ,  H05K2201/09363 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: A method for fabricating semiconductor components such as printed circuit boards, multi chip modules, chip scale packages, and test carriers is provided. The method includes providing a substrate having a blanket deposited conductive layer thereon. Using a laser machining process, grooves are formed in the conductive layer to define patterns of conductors on the substrate. The conductors can be formed with a desired size and spacing, and can include features such as bond pads, conductive vias, and external ball contacts. In addition, selected conductors can be configured as co-planar ground or voltage traces, for adjusting impedance values in other conductors configured as signal traces.

Abstract translation: 提供了一种用于制造诸如印刷电路板，多芯片模块，芯片级封装和测试载体的半导体部件的方法。 该方法包括提供其上具有覆盖层的导电层的衬底。 使用激光加工工艺，在导电层中形成凹槽以限定衬底上的导体图案。 导体可以形成为期望的尺寸和间隔，并且可以包括诸如接合焊盘，导电通孔和外部球接触的特征。 此外，所选择的导体可以配置为共面接地或电压迹线，用于调整配置为信号迹线的其他导体中的阻抗值。

公开(公告)号：US5525205A

公开(公告)日：1996-06-11

申请号：US292823

申请日：1994-08-19

Applicant: Takayuki Miyashita

Inventor： Takayuki Miyashita

IPC: H05K3/08 ,  B23K26/00 ,  C25D5/02 ,  C25D7/00 ,  H05K1/00 ,  H05K3/02 ,  H05K3/10 ,  H05K3/18 ,  H05K3/24 ,  H05K3/38

CPC classification number: H05K3/108 ,  H05K3/027 ,  H05K1/0284 ,  H05K2201/09118 ,  H05K2201/09363 ,  H05K2203/107 ,  H05K2203/135 ,  H05K3/181 ,  H05K3/241 ,  H05K3/388 ,  Y10S205/917 ,  Y10S205/918

Abstract: A process for forming an electrical circuit component includes forming an initial metal layer on a surface of a synthetic plastics substrate, and irradiating the initial metal layer with laser light along a closed path so as to remove the initial metal layer therealong. The closed path irradiated by the laser light thereby establishes an insulating region covered by a first portion of the initial metal layer which is bounded by the closed path, and a conducting region covered by a second portion of the initial metal layer which surrounds the closed path and the insulating region established thereby. A further metal layer is then formed over the second portion of the initial metal layer of the conducting region. The first portion of the initial metal layer of the insulating region may thus be removed to thereby expose a corresponding surface portion of the synthetic plastics substrate.

Abstract translation: 一种形成电路部件的工艺包括在合成塑料基板的表面上形成初始金属层，并沿着封闭的路径用初始金属层照射初始金属层，以便沿着其移除初始金属层。 由激光照射的封闭路径由此建立由初始金属层的第一部分覆盖的绝缘区域，该第一部分由封闭路径限定，以及由初始金属层的围绕封闭路径的第二部分覆盖的导电区域 并由此建立绝缘区域。 然后在导电区域的初始金属层的第二部分上形成另外的金属层。 因此可以除去绝缘区域的初始金属层的第一部分，从而暴露合成塑料基板的相应的表面部分。

公开(公告)号：US5494781A

公开(公告)日：1996-02-27

申请号：US286324

申请日：1994-08-04

Applicant: Ryuji Ohtani ,  Takeshi Okamoto ,  Yoshimitsu Nakamura ,  Yosiyuki Uchinono ,  Kazuo Kamada ,  Kunzi Nakashima ,  Toshiyuki Suzuki

Inventor： Ryuji Ohtani ,  Takeshi Okamoto ,  Yoshimitsu Nakamura ,  Yosiyuki Uchinono ,  Kazuo Kamada ,  Kunzi Nakashima ,  Toshiyuki Suzuki

IPC: B23K26/00 ,  B23K26/06 ,  B23K26/067 ,  B23K26/073 ,  C25D5/02 ,  C25D7/00 ,  H05K3/00 ,  H05K3/02 ,  H05K3/06 ,  H05K3/08 ,  H05K3/10 ,  H05K3/18 ,  G03F7/26

CPC classification number: B23K26/0673 ,  B23K26/0643 ,  B23K26/066 ,  B23K26/067 ,  B23K26/073 ,  H05K3/027 ,  H05K3/064 ,  H05K3/108 ,  H05K2201/09363 ,  H05K2203/107 ,  H05K3/0017 ,  H05K3/0082 ,  H05K3/181 ,  Y10S430/146

Abstract: A method for manufacturing a printed circuit board is to form on a top surface of an insulating substrate a layer of such plating ground as a metal film, to irradiate such electromagetic wave as a laser to a boundary edge zone of non-circuit parts with respect to circuit-printing parts on the insulating substrate in correspondence to a pattern of the non-circuit parts to remove the plating ground layer at the part irradiate by the electromagnetic wave with the plating ground layer at the non-irradiated part left as formed, and thereafter to form a plating on the surface of the plating ground layer at the non-irradiated parts, whereby it is enabled to allow the laser irradiation to be carried out only with respect to the boundary edge zone of the non-circuit parts, without irradiating all over the non-circuit parts.

Abstract translation: 制造印刷电路板的方法是在绝缘基板的顶表面上形成作为金属膜的这种电镀地层的层，以将这样的激光电磁波照射到非电路部分的边界边缘区域 对应于非电路部分的图案在绝缘基板上对电路印刷部分进行电路印刷，以在被形成的未照射部分处的电镀接地层用电磁波照射的部分去除电镀接地层，以及 之后在未照射部分的电镀接地层的表面上形成电镀，由此能够仅在非电路部分的边界边缘区域进行激光照射，而不照射 遍布非电路部分。

公开(公告)号：US4177497A

公开(公告)日：1979-12-04

申请号：US865636

申请日：1977-12-29

Applicant: Thomas J. McCook ,  John F. Shragal

Inventor： Thomas J. McCook ,  John F. Shragal

IPC: G01R1/04 ,  G01R1/20 ,  H05K1/18 ,  H05K3/20 ,  H02B1/04

CPC classification number: G01R1/0408 ,  G01R1/04 ,  H05K3/202 ,  H05K1/182 ,  H05K2201/09118 ,  H05K2201/09363 ,  H05K2201/09754 ,  H05K2201/10113 ,  H05K2201/10151

Abstract: An indicator assemblyhaving a plurality of indicators mounted in a common rectangular housing having a rear wall, there being provided a circuit plate integrally molded in the rear wall of the housing that provides the necessary circuitry for actuating each of the indicators from a remote transducer, the circuit plate prior to being molded into the rear wall of the housing having narrow cut-out portions defining the circuits in the plate with small web bridges across these cut-out portions to provide the necessary support for the plate prior to insertion molding into the rear wall, and after molding the housing these supporting webs are selectively removed through the housing rear wall and the circuit plate at each of these webs to isolate the circuits in the circuit plate.

Abstract translation: 一种指示器组件，其具有安装在具有后壁的公共矩形壳体中的多个指示器，其中设置有一体地模制在壳体的后壁中的电路板，其提供用于从远程换能器致动每个指示器的必要电路， 在模制到壳体的后壁之前的电路板具有狭窄的切口部分，该切口部分限定了板上的电路，其中在这些切口部分上具有小的腹板桥，以在插入模制到后部之前为板提供必要的支撑 壁，并且在模制壳体之后，通过壳体后壁和每个这些腹板上的电路板选择性地移除这些支撑腹板以隔离电路板中的电路。