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    Method for manufacturing movable portion of semiconductor device
    101.
    发明申请
    Method for manufacturing movable portion of semiconductor device 有权
    制造半导体器件的可移动部分的方法

    公开(公告)号：US20050054153A1

    公开(公告)日：2005-03-10

    申请号：US10936539

    申请日：2004-09-09

    Applicant: Kazushi Asami ,  Junji Oohara ,  Hiroshi Muto ,  Kazuhiko Sugiura ,  Tsuyoshi Fukada ,  Yukihiro Takeuchi

    Inventor： Kazushi Asami ,  Junji Oohara ,  Hiroshi Muto ,  Kazuhiko Sugiura ,  Tsuyoshi Fukada ,  Yukihiro Takeuchi

    IPC: B81C1/00 ,  H01L21/306 ,  H01L29/80 ,  H05K3/06

    CPC classification number: B81C1/00619 ,  B81C2201/0112

    Abstract: A method for manufacturing a semiconductor device having a movable portion includes the steps of: forming a trench on a semiconductor layer so that the trench reaches an insulation layer; and forming a movable portion by etching a sidewall of the trench so that the semiconductor layer is separated from the insulation layer. The steps of forming the trench and forming the movable portion are performed by a reactive ion etching method. The insulation layer disposed on the bottom of the trench is prevented from charging positively in the step of forming the trench. The insulation layer disposed on the bottom of the trench is charged positively in the step of forming the movable portion.

    Abstract translation: 一种制造具有可移动部分的半导体器件的方法包括以下步骤：在半导体层上形成沟槽，使得沟槽到达绝缘层; 以及通过蚀刻沟槽的侧壁形成可动部分，使得半导体层与绝缘层分离。 通过反应离子蚀刻方法进行形成沟槽并形成可动部的步骤。 在形成沟槽的步骤中，防止设置在沟槽底部的绝缘层被正面地充电。 设置在沟槽底部的绝缘层在形成可移动部分的步骤中被正向地充电。

    Small scale wires with microelectromechanical devices
    102.
    发明申请
    Small scale wires with microelectromechanical devices 有权
    小型电线与微机电装置

    公开(公告)号：US20040198064A1

    公开(公告)日：2004-10-07

    申请号：US10606812

    申请日：2003-06-26

    Inventor： Kanakasabapathi Subramanian ,  Noel C. MacDonald

    IPC: H01L021/20

    CPC classification number: B81C1/00142 ,  B81B2203/0361 ,  B81C1/00071 ,  B81C1/00111 ,  B81C2201/0112 ,  Y10S977/70 ,  Y10S977/762

    Abstract: A process cycles between etching and passivating chemistries to create rough sidewalls that are converted into small structures. In one embodiment, a mask is used to define lines in a single crystal silicon wafer. The process creates ripples on sidewalls of the lines corresponding to the cycles. The lines are oxidized in one embodiment to form a silicon wire corresponding to each ripple. The oxide is removed in a further embodiment to form structures ranging from micro sharp tips to photonic arrays of wires. Fluidic channels are formed by oxidizing adjacent rippled sidewalls. The same mask is also used to form other structures for MEMS devices.

    Abstract translation: 蚀刻和钝化化学物质之间的过程循环，以产生转变成小结构的粗糙侧壁。 在一个实施例中，使用掩模来限定单晶硅晶片中的线。 该过程在对应于循环的线的侧壁上产生波纹。 在一个实施例中，线被氧化以形成对应于每个纹波的硅线。 在另一个实施方案中去除氧化物以形成从微尖端到光线阵列的结构。 通过氧化相邻的波纹侧壁形成流体通道。 同样的掩模也用于形成MEMS器件的其他结构。

    Method for producing surface micromechanical structures, and sensor
    103.
    发明申请
    Method for producing surface micromechanical structures, and sensor 失效
    生产表面微机械结构和传感器的方法

    公开(公告)号：US20040089903A1

    公开(公告)日：2004-05-13

    申请号：US10467216

    申请日：2003-12-16

    Inventor： Frank Fischer ,  Wilhelm Frey ,  Lars Metzger

    IPC: H01L021/00 ,  H01L027/14 ,  H01L029/82

    CPC classification number: G01P15/125 ,  B81B2201/025 ,  B81C1/00619 ,  B81C2201/0112 ,  G01P15/0802 ,  G01P2015/0814

    Abstract: A method is described for producing surface micromechanical structures having a high aspect ratio, a sacrificial layer (20) being provided between a substrate (30) and a function layer (10), trenches (60, 61) being provided by a plasma etching process in the function layer (10), at least some of these trenches exposing surface regions (21, 22) of the sacrificial layer (20). To increase the aspect ratio of the trenches, an additional layer (70) is deposited on the side walls of the trenches in at least some sections, but not on the exposed surface regions (21, 22) of the sacrificial layer (20). In addition, a sensor is described, in particular an acceleration sensor or a rotational rate sensor.

    Abstract translation: 描述了一种用于生产具有高纵横比的表面微机械结构的方法，在衬底（30）和功能层（10）之间提供牺牲层（20），通过等离子体蚀刻工艺提供的沟槽（60,61） 在功能层（10）中，这些沟槽中的至少一些暴露了牺牲层（20）的表面区域（21,22）。 为了增加沟槽的纵横比，在牺牲层（20）的暴露的表面区域（21,22）的至少一些部分中，在沟槽的侧壁上沉积附加层（70）。 此外，描述了传感器，特别是加速度传感器或转速传感器。

    Method for anisotropic etching of silicon
    105.
    发明授权
    Method for anisotropic etching of silicon 有权
    硅各向异性蚀刻方法

    公开(公告)号：US06284148B1

    公开(公告)日：2001-09-04

    申请号：US09284914

    申请日：1999-07-16

    Applicant: Franz Laermer ,  Andrea Schilp

    Inventor： Franz Laermer ,  Andrea Schilp

    IPC: B44C122

    CPC classification number: B81C1/00619 ,  B81C2201/0112 ,  H01L21/30655

    Abstract: A method is proposed for anisotropic etching of micro- and nanofeatures in silicon substrates using independently controlled etching steps and polymer deposition steps which succeed one another alternatingly, the quantity of polymer deposited decreasing in the course of the polymer deposition steps, thus preventing any underetching of the micro- and nanofeatures.

    Abstract translation: 提出了一种使用独立控制的蚀刻步骤和聚合物沉积步骤在硅衬底中进行各向异性蚀刻的方法，所述沉积步骤交替地彼此成功，聚合物沉积步骤中沉积的聚合物的量减少，从而防止任何不均匀的 微观和纳米特性。

    Method for manufacturing semiconductor device
    106.
    发明授权
    Method for manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US06277756B1

    公开(公告)日：2001-08-21

    申请号：US09501762

    申请日：2000-02-10

    Applicant: Junji Ohara ,  Shinji Yoshihara ,  Kazuhiko Kano ,  Nobuyuki Ohya

    Inventor： Junji Ohara ,  Shinji Yoshihara ,  Kazuhiko Kano ,  Nobuyuki Ohya

    IPC: H01L21311

    CPC classification number: G01P15/0802 ,  B81B2203/033 ,  B81C1/00619 ,  B81C2201/0112 ,  H01L21/30655 ,  H01L21/762

    Abstract: A method of manufacturing a semiconductor device, which can effectively form a trench having a high aspect ratio with relatively simple steps. An initial trench is formed in a silicon substrate by a reactive ion etching using an oxide film mask as an etching mask. After forming a protection oxide film on an inside surface of the trench, a part of the protection oxide film at which positions at a bottom surface of the trench is removed by a reactive ion etching, so that an etching of the silicon substrate is advanced through the bottom surface of the trench. Furthermore, the step for forming the protection oxide film and the step for re-etching the bottom surface of the trench are repeatedly performed, so that a depth of the trench becomes a predetermined depth. These steps are performed in a common chamber by using plasma processed with switching gases to be introduced to the chamber.

    Abstract translation: 一种制造半导体器件的方法，其可以通过相对简单的步骤有效地形成具有高纵横比的沟槽。 通过使用氧化物膜掩模作为蚀刻掩模的反应离子蚀刻在硅衬底中形成初始沟槽。 在沟槽的内表面上形成保护氧化膜之后，通过反应离子蚀刻去除沟槽底面的位置的保护氧化膜的一部分，使得硅衬底的蚀刻通过 沟槽的底面。 此外，重复执行用于形成保护氧化膜的步骤和重新蚀刻沟槽的底表面的步骤，使得沟槽的深度变为预定深度。 这些步骤通过使用等离子体处理的切换气体被引入腔室在公共室中进行。

    Process for anisotropic plasma etching of different substrates
    107.
    发明授权
    Process for anisotropic plasma etching of different substrates 有权
    不同基板的各向异性等离子体蚀刻工艺

    公开(公告)号：US6127273A

    公开(公告)日：2000-10-03

    申请号：US91031

    申请日：1998-09-28

    Applicant: Franz Laermer ,  Andrea Schilp

    Inventor： Franz Laermer ,  Andrea Schilp

    IPC: B81C1/00 ,  C23F4/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/321 ,  H01L21/465 ,  H01L21/00

    CPC classification number: H01L21/465 ,  B81C1/00619 ,  C23F4/00 ,  H01L21/30655 ,  B81C2201/0112

    Abstract: A method of producing etched structures in substrates by anisotropic plasma etching, wherein an essentially isotropic etching operation and side wall passivation are performed separately and in alternation, with the substrate being a polymer, a metal or a multicomponent system, and portions of the side wall passivation layer applied during passivation of the side wall are transferred to the exposed side surfaces of the side wall during the subsequent etching operations, so the entire method is anisotropic as a whole.

    Abstract translation: PCT No.PCT / DE97 / 02272 Sec。 371日期：1998年9月28日 102（e）1998年9月28日PCT PCT 1997年10月6日PCT公布。 第WO98 / 15972号公报 日期1998年04月16日一种通过各向异性等离子体蚀刻在衬底中制造蚀刻结构的方法，其中基本上各向同性蚀刻操作和侧壁钝化分别进行，并且交替地进行，衬底是聚合物，金属或多组分系统，以及 在侧壁钝化期间施加的侧壁钝化层的部分在随后的蚀刻操作期间转移到侧壁的暴露侧表面，因此整个方法整体上是各向异性的。

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