公开(公告)号：US11776861B2

公开(公告)日：2023-10-03

申请号：US17447041

申请日：2021-09-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Bokyeong Hwang ,  Jingwan Kim ,  Minjung Kim

IPC: H01L23/051 ,  H01L21/60 ,  H01L23/049 ,  H05K9/00

CPC classification number: H01L23/051 ,  H01L21/60 ,  H01L23/049 ,  H05K9/0024 ,  H05K9/0032 ,  H05K9/0033 ,  H01L2021/60082

Abstract: A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A first metal frame is disposed over the substrate around the first semiconductor die. A first metal lid is disposed over the first metal frame. A flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame. An edge of the flap can have a castellated edge. A recess in the first metal frame and a protrusion on the first metal lid can be used to latch the first metal lid onto the first metal frame. A second metal frame and second metal lid can be disposed over an opposite surface of the substrate from the first metal frame.

公开(公告)号：US20230275013A1

公开(公告)日：2023-08-31

申请号：US18304090

申请日：2023-04-20

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungSoo Kim ,  DaeHyeok Ha ,  SangMi Park

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/552 ,  H05K1/02

CPC classification number: H01L23/49827 ,  H01L23/552 ,  H01L24/17 ,  H05K1/0216 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/141 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/3025

Abstract: A semiconductor device has a substrate with a plurality of conductive vias formed through the substrate in an offset pattern. An electrical component is disposed in a die attach area over a first surface of the substrate. The conductive vias are formed around the die attach area of the substrate. A first conductive layer is formed over the first surface of the substrate, and a second conductive layer is formed over the second surface. An encapsulant is deposited over the substrate and electrical component. The substrate is singulated through the conductive vias. A first conductive via has a greater exposed surface area than a second conductive via. A shielding layer is formed over the electrical component and in contact with a side surface of the conductive vias. The shielding layer may extend over a second surface of substrate opposite the first surface of the substrate.

公开(公告)号：US11735489B2

公开(公告)日：2023-08-22

申请号：US17349135

申请日：2021-06-16

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： TaeKeun Lee ,  Youngcheol Kim ,  Youngmin Kim ,  Yongmin Kim

IPC: H01L23/48 ,  H01L23/367 ,  H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/373 ,  H01L21/78

CPC classification number: H01L23/367 ,  H01L21/4857 ,  H01L21/4882 ,  H01L23/3735 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L24/16 ,  H01L21/78 ,  H01L2224/16235 ,  H01L2924/35121

Abstract: A semiconductor device has an electrical component and a first TIM with a first compliant property is disposed over a surface of the electrical component. A second TIM having a second compliant property greater than the first compliant property is disposed over the surface of the electrical component within the first TIM. A third TIM can be disposed over the surface of the electrical component along the first TIM. A heat sink is disposed over the first TIM and second TIM. The second TIM has a shape of a star pattern, grid of dots, parallel lines, serpentine, or concentric geometric shapes. The first TIM provides adhesion for joint reliability and the second TIM provides stress relief. Alternatively, a heat spreader is disposed over the first TIM and second TIM and a heat sink is disposed over a third TIM and fourth TIM on the heat spreader.

公开(公告)号：US20230260881A1

公开(公告)日：2023-08-17

申请号：US18163884

申请日：2023-02-03

Applicant: STATS ChipPAC Pte. Ltd

Inventor： HyunSeok PARK ,  SinJae KIM ,  YongMoo SHIN ,  DongJun SEO

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/16 ,  H01L21/60

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L25/16 ,  H01L21/60

Abstract: A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate including a first surface and a second surface opposite to the first surface; a first electronic component mounted on the first surface of the substrate; a conductive pillar formed on the first surface of the substrate, wherein a height of the conductive pillar is smaller than a height of the first electronic component; and a first encapsulant disposed on the first surface of the substrate and covering the first electronic component and the conductive pillar; forming a groove in the first encapsulant to expose a top surface and a portion of a lateral surface of the conductive pillar; and forming a bump in the groove, wherein the bump covers the top surface and the exposed portion of the lateral surface of the conductive pillar.

公开(公告)号：US11715703B2

公开(公告)日：2023-08-01

申请号：US17660093

申请日：2022-04-21

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： SungWon Cho ,  ChangOh Kim ,  Il Kwon Shim ,  InSang Yoon ,  KyoungHee Park

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/50 ,  H01L23/522 ,  H01L23/00 ,  H01L23/36 ,  H01L23/60 ,  H01L27/02

CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L23/36 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5225 ,  H01L23/562 ,  H01L23/60 ,  H01L24/26 ,  H01L27/0248 ,  H01L2924/181

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

公开(公告)号：US20230238376A1

公开(公告)日：2023-07-27

申请号：US17649005

申请日：2022-01-26

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： GunHyuck Lee ,  SangHyun Son ,  Yujeong Jang ,  Hyeoneui Lee

IPC: H01L25/00 ,  H01L25/10 ,  H01L21/683 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L25/50 ,  H01L25/105 ,  H01L21/6835 ,  H01L21/568 ,  H01L21/4846 ,  H01L21/4853 ,  H01L2225/1041 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2221/68359

Abstract: A semiconductor device has a first semiconductor package including a substrate and an encapsulant deposited over the substrate. An adhesive tape is disposed on the encapsulant. A conductive via is formed by trench cutting through the adhesive tape and encapsulant to expose the substrate. A second semiconductor package is disposed over the adhesive tape opposite the first semiconductor package. The first semiconductor package and second semiconductor package are bonded together by the adhesive tape.

公开(公告)号：US20230215813A1

公开(公告)日：2023-07-06

申请号：US17647069

申请日：2022-01-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： GunHyuck Lee ,  HyunKyu Lee ,  MinJung Kim

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L23/3128

Abstract: A semiconductor device is made by providing a strip substrate including a plurality of units. A hole is formed in the strip substrate. An encapsulant is deposited over the strip substrate. A mask is disposed over the strip substrate and encapsulant with a leg of the mask disposed in the hole. A shielding layer is formed over the mask and strip substrate. The mask is removed after forming the shielding layer. The strip substrate is singulated to separate the plurality of units from each other after forming the shielding layer.

公开(公告)号：US11688718B2

公开(公告)日：2023-06-27

申请号：US17447001

申请日：2021-09-07

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Wagno Alves Braganca, Jr. ,  KyungOe Kim

IPC: H01L21/683 ,  H01L23/00 ,  H01L21/78

CPC classification number: H01L24/97 ,  H01L21/6835 ,  H01L21/78 ,  H01L24/16 ,  H01L24/81 ,  H01L2221/68327 ,  H01L2221/68372 ,  H01L2224/16235 ,  H01L2224/81005 ,  H01L2224/81224 ,  H01L2224/95001 ,  H01L2924/3511

Abstract: A semiconductor device has a semiconductor die and a support tape disposed over a back surface of the semiconductor die opposite an active surface of the semiconductor die. A portion of the back surface of the semiconductor wafer is removed to reduce its thickness. The semiconductor die is part of a semiconductor wafer, and the wafer is singulated to provide the semiconductor die with the support tape disposed on the back surface of the semiconductor die. The support tape can be a polyimide tape. A dicing tape is disposed over the support tape. The semiconductor die is disposed over a substrate. A laser emission is projected onto the semiconductor die to bond the semiconductor die to the substrate. The support tape provides stress relief to avoid warpage of the semiconductor die during the laser emission. The support tape is removed from the back surface of the semiconductor die.

公开(公告)号：US11688697B2

公开(公告)日：2023-06-27

申请号：US17662977

申请日：2022-05-11

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： Dong Won Son ,  Byeonghoon Kim ,  Sung Ho Choi ,  Sung Jae Lim ,  Jong Ho Shin ,  SungWon Cho ,  ChangOh Kim ,  KyoungHee Park

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/367 ,  H01L23/498 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/49816 ,  H01L23/562 ,  H01L24/14 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/181 ,  H01L2924/3025

Abstract: A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.

公开(公告)号：US20230154864A1

公开(公告)日：2023-05-18

申请号：US18155878

申请日：2023-01-18

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： DeokKyung Yang ,  HunTeak Lee ,  HeeSoo Lee ,  Wanil Lee ,  SangDuk Lee

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56 ,  H01L23/66

CPC classification number: H01L23/552 ,  H01L23/3107 ,  H01L21/568 ,  H01L23/66 ,  H01L2223/6677

Abstract: A semiconductor device has a substrate comprising a carrier and an interposer disposed on the carrier. An electrical component is disposed over a first surface of the interposer. An interconnect structure is disposed over the first surface of the interposer. An encapsulant is deposited over the electrical component, interconnect structure, and substrate. A trench is formed through the encapsulant and interposer into the carrier. A shielding layer is formed over the encapsulant and into the trench. The carrier is removed after forming the shielding layer.