公开(公告)号：US07819376B2

公开(公告)日：2010-10-26

申请号：US11930269

申请日：2007-10-31

Applicant: David H. Danovitch ,  Mukta G. Farooq ,  Peter A. Gruber ,  John U. Knickerbocker ,  George R. Proto ,  Da-Yuan Shih

Inventor： David H. Danovitch ,  Mukta G. Farooq ,  Peter A. Gruber ,  John U. Knickerbocker ,  George R. Proto ,  Da-Yuan Shih

IPC: H01L21/44

CPC classification number: H01L24/11 ,  H01L21/6835 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/27334 ,  H01L2224/73104 ,  H01L2224/83 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for forming interconnects onto attachment points of a wafer includes the steps of providing a mold with a plurality of cavities having a predetermined shape, depositing a release agent on surfaces of the cavities, filling the cavities with an interconnect material to form the interconnects, removing the release agent from the mold, and attaching the interconnects to the attachment points of the wafer. An adhesive layer can optionally be deposited in addition to the release layer. The adhesive layer can be used, for example, to bond the chip to a package.

Abstract translation: 用于在晶片的附接点上形成互连的方法包括以下步骤：提供具有预定形状的多个空腔的模具，在空腔的表面上沉积脱模剂，用互连材料填充空腔以形成互连， 从模具中除去脱模剂，以及将互连件附接到晶片的附接点。 除了剥离层之外，还可任选地沉积粘合剂层。 粘合剂层可以用于例如将芯片粘合到包装上。

公开(公告)号：US07751924B2

公开(公告)日：2010-07-06

申请号：US11830349

申请日：2007-07-30

Applicant: Timothy J Chainer ,  Peter A Gruber ,  Dennis G Manzer

Inventor： Timothy J Chainer ,  Peter A Gruber ,  Dennis G Manzer

IPC: G06F19/00 ,  H01L23/544 ,  B23K31/02 ,  B23K35/36

CPC classification number: B23K3/0623 ,  B23K2101/40 ,  H01L24/742 ,  H01L2224/11334 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/00

Abstract: An apparatus for placing solder bumps on a mold plate includes: a solder fill head configured for dispensing molten solder onto the mold plate, the solder fill head also configured for relative movement over the mold plate; and a control mechanism configured for controlling positions of the solder fill head relative to the mold plate. The control mechanism includes: a control input signal containing data about an ideal positioning of the solder fill head; a plurality of sensors positioned on the solder fill head, the sensors configured for providing data about a gap between the solder fill head and the mold plate; a position controller configured for receiving the gap data and comparing the gap data with the control input signal, wherein the position controller provides an inequality signal if the gap data and the control input signal are not equal; an amplifier configured for receiving the inequality signal and amplifying it; and an actuator configured for receiving the amplified inequality signal and controlling movement of the solder fill head in response to the inequality signal received. The control mechanism may be a servo control mechanism. The sensors may be gap sensors.

Abstract translation: 用于将焊料凸块放置在模板上的装置包括：焊料填充头，其被配置用于将熔融焊料分配到模板上，焊料填充头还构造成用于相对于模具板上的移动; 以及控制机构，被配置为控制焊料填充头相对于模板的位置。 控制机构包括：控制输入信号，其包含关于焊料填充头的理想定位的数据; 定位在焊料填充头上的多个传感器，所述传感器被配置为提供关于焊料填充头和模板之间的间隙的数据; 位置控制器，被配置为接收间隙数据并将间隙数据与控制输入信号进行比较，其中如果间隙数据和控制输入信号不相等，则位置控制器提供不等式信号; 放大器，被配置为接收不等式信号并对其进行放大; 以及致动器，被配置为接收放大的不等式信号，并响应于所接收的不等式信号控制焊料填充头的移动。 控制机构可以是伺服控制机构。 传感器可以是间隙传感器。

公开(公告)号：US20090065555A1

公开(公告)日：2009-03-12

申请号：US11854008

申请日：2007-09-12

Applicant: Stephen Leslie Buchwalter ,  Peter A. Gruber ,  Da-Yuan Shih

Inventor： Stephen Leslie Buchwalter ,  Peter A. Gruber ,  Da-Yuan Shih

IPC: B23K31/02

CPC classification number: B23K1/0016 ,  B23K2101/40

Abstract: An electrical structure method of forming. The method includes forming a plurality of individual metallic structures from metallic layer formed over a first substrate. A plurality of vias are formed within a second substrate. The plurality of vias are positioned over and surrounding the plurality of metallic structures. A portion of each via is filled with solder to form solder structure surrounding an exterior surface of each metallic structure. The first substrate is removed from the metallic structures. The metallic structures comprising the solder structures are positioned over a third substrate comprising a plurality of electrically conductive pads. The metallic structures comprising the solder structures are heated to a temperature sufficient to cause the solder to melt and form an electrical and mechanical connection between each metallic structure and an associated electrically conductive pad. The second substrate is removed from the individual metallic structures.

Abstract translation: 一种形成电气结构的方法。 该方法包括从形成在第一衬底上的金属层形成多个单独的金属结构。 多个通孔形成在第二基板内。 多个通孔位于多个金属结构上并围绕着多个金属结构。 每个通孔的一部分填充有焊料以形成围绕每个金属结构的外表面的焊料结构。 从金属结构中去除第一衬底。 包括焊料结构的金属结构位于包括多个导电焊盘的第三基板上。 包括焊料结构的金属结构被加热到足以使焊料熔化并在每个金属结构和相关联的导电焊盘之间形成电和机械连接的温度。 从各个金属结构移除第二基板。

公开(公告)号：US07416104B2

公开(公告)日：2008-08-26

申请号：US11409232

申请日：2006-04-21

Applicant: Steven A. Cordes ,  Peter A. Gruber ,  John U. Knickerbocker ,  James L. Speidell

Inventor： Steven A. Cordes ,  Peter A. Gruber ,  John U. Knickerbocker ,  James L. Speidell

IPC: B23K31/02

CPC classification number: B23K3/0638 ,  B23K35/02 ,  B23K2101/40 ,  H01L2224/11

Abstract: A system and method for injection molding conductive bonding material into a plurality of cavities in a non-rectangular mold is disclosed. The method comprises aligning a fill head with a non-rectangular mold. The non-rectangular mold includes a plurality of cavities. The fill head is placed in substantial contact with the non-rectangular mold. Rotational motion is provided to at least one of the non-rectangular mold and the fill head while the fill head is in substantial contact with the non-rectangular mold. Conductive bonding material is forced out of the fill head toward the non-rectangular mold. The conductive bonding material is provided into at least one cavity of the plurality of cavities contemporaneous with the at least one cavity being in proximity to the fill head.

Abstract translation: 公开了一种用于将导电接合材料注射成非矩形模具中的多个空腔的系统和方法。 该方法包括将填充头与非矩形模具对准。 非矩形模具包括多个空腔。 填充头被放置成与非矩形模具基本接触。 旋转运动提供给非矩形模具和填充头中的至少一个，同时填充头基本上与非矩形模具接触。 将导电接合材料从填充头推向非矩形模具。 导电接合材料被提供到与填充头附近的至少一个空腔同时的多个空腔的至少一个空腔中。

公开(公告)号：US20080182124A1

公开(公告)日：2008-07-31

申请号：US11669076

申请日：2007-01-30

Applicant: Peter A. Gruber ,  Donald W. Henderson ,  Sung K. Kang ,  Da-Yuan Shih

Inventor： Peter A. Gruber ,  Donald W. Henderson ,  Sung K. Kang ,  Da-Yuan Shih

IPC: B32B15/00 ,  B23K1/00

CPC classification number: B23K35/262 ,  H05K3/3463 ,  Y10T403/479 ,  Y10T428/12708

Abstract: A solder joint comprising a solder capture pad on a substrate having a circuit; and a lead containing or a lead free solder selected from the group comprising Sn—Ag—Cu solder, Sn—Cu solder and Sn—Ag solder adhered to the solder capture pad; the solder selected from the group comprising between 0.1 and 6.0 per cent by weight Zn. A solder joint, comprising a solder capture pad on a substrate having a circuit; and a Sn—Cu lead free solder adhered to the solder capture pad, the solder comprising between 0.1 and 6.0 % by weight Zn. Formation of voids at an interface between the solder and the solder capture pad is suppressed. A method for forming solder joints using the solders.

Abstract translation: 一种焊接接头，包括在具有电路的基板上的焊料捕获垫; 以及从包含Sn-Ag-Cu焊料，Sn-Cu焊料和Sn-Ag焊料的组中选择的含铅或无铅焊料，其粘附到焊料捕获垫上; 选自包含0.1至6.0重量％Zn的组的焊料。 一种焊接接头，包括在具有电路的基板上的焊料捕获垫; 并且Sn-Cu无铅焊料粘附到焊料捕获垫，焊料包含0.1至6.0重量％的Zn。 阻止在焊料和焊料捕获垫之间的界面处形成空隙。 一种使用焊料形成焊点的方法。

公开(公告)号：US20080175939A1

公开(公告)日：2008-07-24

申请号：US11930269

申请日：2007-10-31

Applicant: David H. Danovitch ,  Mukta G. Farooq ,  Peter A. Gruber ,  John U. Knickerbocker ,  George R. Proto ,  Da-Yuan Shih

Inventor： David H. Danovitch ,  Mukta G. Farooq ,  Peter A. Gruber ,  John U. Knickerbocker ,  George R. Proto ,  Da-Yuan Shih

IPC: B29C35/08

CPC classification number: H01L24/11 ,  H01L21/6835 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/111 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/27334 ,  H01L2224/73104 ,  H01L2224/83 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/27 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A method for forming interconnects onto attachment points of a wafer includes the steps of providing a mold with a plurality of cavities having a predetermined shape, depositing a release agent on surfaces of the cavities, filling the cavities with an interconnect material to form the interconnects, removing the release agent from the mold, and attaching the interconnects to the attachment points of the wafer. An adhesive layer can optionally be deposited in addition to the release layer. The adhesive layer can be used, for example, to bond the chip to a package.

Abstract translation: 用于在晶片的附接点上形成互连的方法包括以下步骤：提供具有预定形状的多个空腔的模具，在空腔的表面上沉积脱模剂，用互连材料填充空腔以形成互连， 从模具中除去脱模剂，以及将互连件附接到晶片的附接点。 除了剥离层之外，还可任选地沉积粘合剂层。 粘合剂层可以用于例如将芯片粘合到包装上。

公开(公告)号：US20080156849A1

公开(公告)日：2008-07-03

申请号：US11619197

申请日：2007-01-03

Applicant: Eric E. Bouchard ,  Guy Brouillette ,  David H. Danovitch ,  Peter A. Gruber ,  Jean-Luc Landreville

Inventor： Eric E. Bouchard ,  Guy Brouillette ,  David H. Danovitch ,  Peter A. Gruber ,  Jean-Luc Landreville

IPC: B23K3/00

CPC classification number: B23K3/08 ,  B23K2101/42

Abstract: An apparatus and a method for the removal of excess solder or contaminant, which are encountered on the surfaces of injection mold prior to the transfer of a solder on a silicon wafer. More particularly, there is provided for the removal of excess solder, which may be present on a mold surface, without removing any solder, which is located in cavities formed in the mold, and wherein the solder is applied through an injection molded soldering process.

Abstract translation: 用于去除在硅晶片上的焊料转移之前在注射模具的表面上遇到的多余的焊料或污染物的装置和方法。 更具体地，提供了可以存在于模具表面上的多余的焊料的去除，而不去除位于模具中形成的空腔中的任何焊料，并且其中通过注射成型焊接工艺施加焊料。

公开(公告)号：US07273806B2

公开(公告)日：2007-09-25

申请号：US10905013

申请日：2004-12-09

Applicant: Robert A. Groves ,  Peter A. Gruber ,  Kevin S. Petrarca ,  Richard P. Volant ,  George F. Walker

Inventor： Robert A. Groves ,  Peter A. Gruber ,  Kevin S. Petrarca ,  Richard P. Volant ,  George F. Walker

IPC: H01L21/44

CPC classification number: H05K3/3468 ,  G01R1/07314 ,  G01R3/00 ,  H01L21/4853 ,  H01L21/6835 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01058 ,  H01L2924/01066 ,  H01L2924/01067 ,  H01L2924/01068 ,  H01L2924/01075 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19042 ,  H05K3/325 ,  H05K2201/09745 ,  H05K2201/10734 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/128 ,  H05K2203/162 ,  H05K2203/167 ,  H01L2224/0401

Abstract: Methods of forming a conductive structure on a substrate prior to packaging, and a test probe structure generated according to the method, are disclosed. The conductive structure includes a high aspect ratio structure formed by injected molded solder. The invention can be applied to form passive elements and interconnects on a conventional semiconductor substrate after the typical BEOL, and prior to packaging. The method may provide better electromigration characteristics, lower resistivity, and higher Q factors for conductive structures. In addition, the method is backwardly compatible and customizable.

Abstract translation: 公开了在封装之前在基板上形成导电结构的方法和根据该方法生成的测试探针结构。 导电结构包括通过注射成型的焊料形成的高纵横比结构。 本发明可以应用于在典型的BEOL之后以及在封装之前在常规半导体衬底上形成无源元件和互连。 该方法可以为导电结构提供更好的电迁移特性，较低的电阻率和更高的Q因子。 此外，该方法可以向后兼容并可定制。

公开(公告)号：US07131565B2

公开(公告)日：2006-11-07

申请号：US10721494

申请日：2003-11-25

Applicant: Peter A Gruber ,  Lannie R Bolde

Inventor： Peter A Gruber ,  Lannie R Bolde

IPC: B23K15/02 ,  B23K20/00 ,  B23Q15/00 ,  B23Q16/00

CPC classification number: B23K3/0638 ,  B23K3/053 ,  B23K3/0607

Abstract: A solder feeding device having a reservoir, a drive unit, a first lead, and a second lead is provided. The reservoir melts solid solder wire into molten solder, while the drive unit selectively feeds the solid solder wire into the reservoir. The first and second leads are in electrical communication with the drive unit. The first lead is positioned in the reservoir so that it electrically communicates with the second lead through the molten solder when the molten solder reaches a triggering level, but so that it does not electrically communicate with the second lead when the level is below the triggering level. The drive unit feeds the solid solder wire into the reservoir based upon a state of electrical communication between the first and second leads.

Abstract translation: 提供具有储存器，驱动单元，第一引线和第二引线的焊料馈送装置。 储存器将固体焊丝熔化成熔融焊料，而驱动单元选择性地将固体焊丝馈送到储存器中。 第一和第二引线与驱动单元电连通。 第一引线定位在储存器中，使得当熔融焊料达到触发水平时，其通过熔融焊料与第二引线电连通，但是当电平低于触发电平时它不与第二引线电连通 。 驱动单元基于第一和第二引线之间的电连通状态将固体焊丝馈送到储存器中。

公开(公告)号：US06656750B1

公开(公告)日：2003-12-02

申请号：US09301889

申请日：1999-04-29

Applicant: Madhav Datta ,  Peter A. Gruber ,  Judith M. Rubino ,  Carlos J. Sambucetti ,  George F. Walker

Inventor： Madhav Datta ,  Peter A. Gruber ,  Judith M. Rubino ,  Carlos J. Sambucetti ,  George F. Walker

IPC: G01R3126

CPC classification number: H01L24/13 ,  B23K1/0016 ,  B23K1/20 ,  B23K2101/36 ,  G01R31/2886 ,  H01L22/00 ,  H01L24/11 ,  H01L24/14 ,  H01L2224/0401 ,  H01L2224/0603 ,  H01L2224/1148 ,  H01L2224/1184 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2924/0001 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H05K3/3436 ,  H01L2924/00014

Abstract: A method for testing integrated circuit chips with probe wires on flat solder bumps and IC chips that are equipped with flat solder bumps are disclosed. In the method, an IC chip that has a multiplicity of bond pads and a multiplicity of flat solder bumps are first provided in which each of the solder bumps has a height less than ½ of its diameter on the multiplicity of bond pads. The probe wires can thus be easily used to contact the increased target area on the solder bumps for establishing electrical connection with a test circuit. The probe can further be conducted easily with all the Z height of the bumps are substantially equal. The height of the solder bumps may be suitably controlled by either a planarization process in which soft solder bumps are compressed by a planar surface, or solder bumps are formed in an in-situ mold by either a MSS or an electroplating process for forming solder bumps in the shape of short cylinders. When the MSS method is used for planting the bumps, solder bumps are transferred onto the wafer surface in a substantially flattened hemi-spherical shape.

Abstract translation: 公开了一种在平坦焊料凸块上测试集成电路芯片的方法以及配备有平坦焊料凸块的IC芯片。 在该方法中，首先提供具有多个接合焊盘和多个平坦焊料凸块的IC芯片，其中每个焊料凸块在多个焊盘上具有小于其直径的1/2的高度。 因此，探针线可以容易地用于接触焊料凸块上的增加的目标区域，以建立与测试电路的电连接。 探针可以容易地进行，凸块的所有Z高度基本相等。 焊料凸块的高度可以通过平面化处理来适当地控制，其中软焊料凸块被平面表面压缩，或者通过用于形成焊料凸块的MSS或电镀工艺在原位模具中形成焊料凸块 呈短圆柱形。 当使用MSS方法种植凸块时，焊料凸块以大致平坦的半球形转移到晶片表面上。