公开(公告)号：US20160322366A1

公开(公告)日：2016-11-03

申请号：US14724775

申请日：2015-05-28

Applicant: United Microelectronics Corp.

Inventor： Chih-Kai Hsu ,  Chao-Hung Lin ,  Yu-Hsiang Hung ,  Ssu-I Fu ,  Jyh-Shyang Jenq

IPC: H01L27/11 ,  H01L27/02

CPC classification number: H01L27/1104 ,  H01L27/0207

Abstract: A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells comprises: a gate structure on the substrate; a first interlayer dielectric (ILD) layer around the gate structure; a first contact plug in the first ILD layer; a second ILD layer on the first ILD layer; and a second contact plug in the second ILD layer and electrically connected to the first contact plug.

Abstract translation: 公开了一种静态随机存取存储器（SRAM）。 SRAM包括在衬底上的多个SRAM单元，其中每个SRAM单元包括：衬底上的栅极结构; 围绕栅极结构的第一层间电介质（ILD）层; 第一ILD层中的第一接触插塞; 第一ILD层上的第二ILD层; 以及在所述第二ILD层中的第二接触插塞，并且电连接到所述第一接触插塞。

公开(公告)号：US09455194B1

公开(公告)日：2016-09-27

申请号：US14864852

申请日：2015-09-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Li-Wei Feng ,  Chien-Ting Lin ,  Shih-Hung Tsai ,  Ssu-I Fu ,  Hon-Huei Liu ,  Shih-Fang Hong ,  Chao-Hung Lin ,  Jyh-Shyang Jenq

IPC: H01L21/461 ,  H01L21/8234 ,  H01L21/3065 ,  H01L21/308

CPC classification number: H01L21/823412 ,  H01L21/3086 ,  H01L21/823431

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a material layer on the substrate; forming a plurality of first mandrels on the material layer of the first region and the second region; forming first spacers adjacent to the first mandrels; forming a hard mask on the first region; trimming the first spacers on the second region; removing the first mandrels; using the first spacers to remove part of the material layer for forming a plurality of second mandrels; forming second spacers adjacent to the second mandrels; removing the second mandrels; and using the second spacers to remove part of the substrate for forming a plurality of fin-shaped structures.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供具有限定在其上的第一区域和第二区域的衬底; 在所述基板上形成材料层; 在所述第一区域和所述第二区域的材料层上形成多个第一心轴; 形成与所述第一心轴相邻的第一间隔件; 在第一区域上形成硬掩模; 修剪第二区域上的第一间隔物; 去除第一个心轴; 使用所述第一间隔件去除用于形成多个第二心轴的所述材料层的一部分; 形成与所述第二心轴相邻的第二间隔件; 移除第二个心轴; 并且使用第二间隔件去除用于形成多个鳍状结构的基板的一部分。

公开(公告)号：US20160247678A1

公开(公告)日：2016-08-25

申请号：US14629491

申请日：2015-02-24

Applicant: United Microelectronics Corp.

Inventor： Li-Wei Feng ,  Shih-Hung Tsai ,  Chao-Hung Lin ,  Hon-Huei Liu ,  An-Chi Liu ,  Chih-Wei Wu ,  Jyh-Shyang Jenq ,  Shih-Fang Hong ,  En-Chiuan Liou ,  Ssu-I Fu ,  Yu-Hsiang Hung ,  Chih-Kai Hsu ,  Mei-Chen Chen ,  Chia-Hsun Tseng

IPC: H01L21/033 ,  H01L21/66

CPC classification number: H01L21/0337 ,  H01L21/0338 ,  H01L21/3083 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/823431 ,  H01L22/12

Abstract: A method of forming a semiconductor structure includes following steps. First of all, a patterned hard mask layer having a plurality of mandrel patterns is provided. Next, a plurality of first mandrels is formed on a substrate through the patterned hard mask. Following these, at least one sidewall image transferring (SIT) process is performed. Finally, a plurality of fins is formed in the substrate, wherein each of the fins has a predetermined critical dimension (CD), and each of the mandrel patterns has a CD being 5-8 times greater than the predetermined CD.

Abstract translation: 形成半导体结构的方法包括以下步骤。 首先，提供具有多个心轴图案的图案化的硬掩模层。 接下来，通过图案化的硬掩模在基板上形成多个第一心轴。 接下来，执行至少一个侧壁图像传送（SIT）处理。 最后，在基板上形成多个散热片，其中每个翅片具有预定的临界尺寸（CD），并且每个心轴图案具有比预定CD大5-8倍的CD。

公开(公告)号：US20160203982A1

公开(公告)日：2016-07-14

申请号：US14636200

申请日：2015-03-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chao-Hung Lin ,  Shih-Fang Hong ,  Li-Wei Feng ,  Shih-Hung Tsai ,  Ssu-I Fu ,  Jyh-Shyang Jenq

IPC: H01L21/033 ,  H01L21/311

CPC classification number: H01L21/3086 ,  H01L21/3081

Abstract: The present invention provides a method for forming trenches. First, a mandrel layer is formed on a substrate, wherein the mandrel layer comprises a stop layer and a sacrificial layer. A spacer is formed on at least a sidewall of the mandrel layer, following by forming a material layer on the substrate for covering the spacer and the mandrel layer. After performing a removing process to remove apart of the material layer, apart of the spacer and the sacrificial layer; the spacer is removed to form at least one first trench in the remaining material layer and the mandrel.

Abstract translation: 本发明提供一种形成沟槽的方法。 首先，在基板上形成心轴层，其中心轴层包括停止层和牺牲层。 在心轴层的至少一个侧壁上形成间隔物，然后在衬底上形成用于覆盖间隔物和心轴层的材料层。 在执行去除处理以除去材料层之外的间隔物和牺牲层的间隔; 去除间隔物以在剩余材料层和心轴中形成至少一个第一沟槽。

公开(公告)号：US09384978B1

公开(公告)日：2016-07-05

申请号：US14636200

申请日：2015-03-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chao-Hung Lin ,  Shih-Fang Hong ,  Li-Wei Feng ,  Shih-Hung Tsai ,  Ssu-I Fu ,  Jyh-Shyang Jenq

IPC: H01L21/76 ,  H01L21/033 ,  H01L21/311

CPC classification number: H01L21/3086 ,  H01L21/3081

Abstract: The present invention provides a method for forming trenches. First, a mandrel layer is formed on a substrate, wherein the mandrel layer comprises a stop layer and a sacrificial layer. A spacer is formed on at least a sidewall of the mandrel layer, following by forming a material layer on the substrate for covering the spacer and the mandrel layer. After performing a removing process to remove apart of the material layer, apart of the spacer and the sacrificial layer; the spacer is removed to form at least one first trench in the remaining material layer and the mandrel.

Abstract translation: 本发明提供一种形成沟槽的方法。 首先，在基板上形成心轴层，其中心轴层包括停止层和牺牲层。 在心轴层的至少一个侧壁上形成间隔物，然后在衬底上形成用于覆盖间隔物和心轴层的材料层。 在执行去除处理以除去材料层之外的间隔物和牺牲层的间隔; 去除间隔物以在剩余材料层和心轴中形成至少一个第一沟槽。

公开(公告)号：US09379119B1

公开(公告)日：2016-06-28

申请号：US14749623

申请日：2015-06-24

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Hsien Huang ,  Yu-Tse Kuo ,  Shu-Ru Wang ,  Yu-Hsiang Hung ,  Ssu-I Fu ,  Chih-Kai Hsu ,  Jyh-Shyang Jenq

IPC: H01L23/48 ,  H01L27/11 ,  H01L23/522 ,  H01L23/528 ,  H01L27/088 ,  H01L27/02 ,  H01L27/092

CPC classification number: H01L27/1104 ,  H01L27/0207 ,  H01L27/0886 ,  H01L27/0924

Abstract: A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells further includes: a gate structure on the substrate, a plurality of fin structures disposed on the substrate, where each fin structure is arranged perpendicular to the arrangement direction of the gate structure, a first interlayer dielectric (ILD) layer around the gate structure, a first contact plug in the first ILD layer, where the first contact plug is strip-shaped and contacts two different fin structures; and a second ILD layer on the first ILD layer.

Abstract translation: 公开了一种静态随机存取存储器（SRAM）。 SRAM包括在衬底上的多个SRAM单元，其中每个SRAM单元还包括：衬底上的栅极结构，设置在衬底上的多个鳍结构，其中每个鳍结构垂直于排列方向排列 栅极结构周围的第一层间电介质（ILD）层，第一ILD层中的第一接触插塞，其中第一接触插塞为带状并接触两个不同的翅片结构; 和第一ILD层上的第二ILD层。

公开(公告)号：US09318334B2

公开(公告)日：2016-04-19

申请号：US14469606

申请日：2014-08-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Hsiang Hung ,  Ssu-I Fu ,  Shih-Hung Tsai ,  Jyh-Shyang Jenq ,  Chih-Kai Hsu

IPC: H01L21/336 ,  H01L21/28 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/78 ,  H01L27/092 ,  H01L21/308

CPC classification number: H01L21/28132 ,  H01L21/0337 ,  H01L21/28035 ,  H01L21/28158 ,  H01L21/3086 ,  H01L21/32139 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a plurality of fin-shaped structures on the substrate; forming a gate layer on the fin-shaped structures; forming a material layer on the gate layer; patterning the material layer for forming sacrificial mandrels on the gate layer in the first region; forming sidewall spacers adjacent to the sacrificial mandrels; removing the sacrificial mandrels; forming a patterned mask on the second region; and utilizing the patterned mask and the sidewall spacers to remove part of the gate layer.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供具有限定在其上的第一区域和第二区域的衬底; 在所述基板上形成多个鳍状结构; 在鳍状结构上形成栅极层; 在栅极层上形成材料层; 图案化用于在第一区域中的栅极层上形成牺牲心轴的材料层; 形成与牺牲心轴相邻的侧壁间隔物; 去除牺牲心轴; 在所述第二区域上形成图案化掩模; 并且利用图案化掩模和侧壁间隔物去除栅极层的一部分。

公开(公告)号：US20160020323A1

公开(公告)日：2016-01-21

申请号：US14463676

申请日：2014-08-20

Applicant: United Microelectronics Corp.

Inventor： Yen-Liang Wu ,  Chung-Fu Chang ,  Yu-Hsiang Hung ,  Wen-Jiun Shen ,  Ssu-I Fu ,  Man-Ling Lu ,  Chia-Jong Liu ,  Yi-Wei Chen

IPC: H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L29/0673 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7854

Abstract: A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.

Abstract translation: 半导体器件包括鳍结构，绝缘结构，突出结构，外延结构和栅极结构。 翅片结构和绝缘结构设置在基板上。 突出结构与基板直接接触，并从绝缘结构部分突出，突出结构为翅片结构。 外延结构设置在翅片结构的顶表面上并完全覆盖翅片结构的顶表面。 此外，外延结构具有弯曲的顶表面。 栅极结构覆盖鳍结构和外延结构。

公开(公告)号：US20160020110A1

公开(公告)日：2016-01-21

申请号：US14462114

申请日：2014-08-18

Applicant: United Microelectronics Corp.

Inventor： Man-Ling Lu ,  Yu-Hsiang Hung ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Wen-Jiun Shen ,  Chia-Jong Liu ,  Ssu-I Fu ,  Yi-Wei Chen

IPC: H01L21/308 ,  H01L29/78

CPC classification number: H01L29/7848 ,  H01L21/3086 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/78

Abstract: A method of forming a semiconductor device is provided. At least one stacked structure is provided on a substrate. A first spacer material layer, a second spacer material layer, and a third spacer material layer are sequentially formed on the substrate and cover the stacked structure. The first, second, and third spacer material layers are etched to form a tri-layer spacer structure on the sidewall of the stacked structure. The tri-layer spacer structure includes, from one side of the stacked structure, a first spacer, a second spacer, and a third spacer, and a dielectric constant of the second spacer is less than each of a dielectric constant of the first spacer and a dielectric constant of the third spacer.

Abstract translation: 提供一种形成半导体器件的方法。 在基板上设置至少一个层叠结构。 第一间隔物层，第二间隔物层和第三间隔物层依次形成在基板上并覆盖层叠结构。 第一，第二和第三间隔物材料层被蚀刻以在堆叠结构的侧壁上形成三层间隔结构。 三层间隔结构包括从层叠结构的一侧形成第一间隔物，第二间隔物和第三间隔物，第二间隔物的介电常数小于第一间隔物的介电常数和 第三间隔物的介电常数。

公开(公告)号：US20160005838A1

公开(公告)日：2016-01-07

申请号：US14855793

申请日：2015-09-16

Applicant: United Microelectronics Corp.

Inventor： Yu-Hsiang Hung ,  Ssu-I Fu ,  Chung-Fu Chang ,  Yen-Liang Wu ,  Cho-Han Fan ,  Chien-Ting Lin

IPC: H01L29/66

CPC classification number: H01L29/66795 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823821 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848 ,  H01L29/785

Abstract: A process for fabricating a fin-type field effect transistor (FinFET) structure is described. A semiconductor substrate is patterned to form a fin. A spacer is formed on the sidewall of the fin. A portion of the fin is removed, such that the spacer and the surface of the remaining fin together define a cavity. A piece of a semiconductor compound is formed from the cavity, wherein the upper portion of the piece of the semiconductor compound laterally extends over the spacer.

Abstract translation: 描述了制造鳍式场效应晶体管（FinFET）结构的工艺。 图案化半导体衬底以形成翅片。 隔板形成在翅片的侧壁上。 翅片的一部分被去除，使得间隔件和剩余的翅片的表面一起限定了空腔。 半导体化合物的一部分由空腔形成，其中半导体化合物片的上部横向延伸在间隔物上。