公开(公告)号：US20100109098A1

公开(公告)日：2010-05-06

申请号：US12339990

申请日：2008-12-19

Applicant: Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi-Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi-Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L29/51 ,  H01L21/3205 ,  H01L21/4763 ,  H01L29/49 ,  H01L21/336

CPC classification number: H01L29/518 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/0228 ,  H01L21/02362 ,  H01L21/28088 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/3141 ,  H01L21/31645 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/513

Abstract: A method of fabricating a gate of a semiconductor device is provided. In an embodiment, the method includes forming a gate dielectric layer on a semiconductor substrate. An interface layer is formed on the gate dielectric layer. In an embodiment, the gate dielectric layer includes HfO2 and the interface layer includes Hf—N. A work function metal layer may be formed on the interface layer. A device is also provided.

Abstract translation: 提供一种制造半导体器件的栅极的方法。 在一个实施例中，该方法包括在半导体衬底上形成栅极电介质层。 界面层形成在栅介质层上。 在一个实施例中，栅介质层包括HfO 2，界面层包括Hf-N。 可以在界面层上形成功函数金属层。 还提供了一种设备。

公开(公告)号：US08609446B2

公开(公告)日：2013-12-17

申请号：US13267025

申请日：2011-10-06

Applicant: Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Chih-Kuang Yu ,  Hung-Yi Kuo

Inventor： Chyi Shyuan Chern ,  Hsin-Hsien Wu ,  Chih-Kuang Yu ,  Hung-Yi Kuo

IPC: H01L21/00

CPC classification number: H01L33/62 ,  H01L23/49513 ,  H01L25/0753 ,  H01L33/0095 ,  H01L33/08 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A method of light-emitting diode (LED) packaging includes coupling a number of LED dies to corresponding bonding pads on a sub-mount. A mold apparatus having concave recesses housing LED dies is placed over the sub-mount. The sub-mount, the LED dies, and the mold apparatus are heated in a thermal reflow process to bond the LED dies to the bonding pads. Each recess substantially restricts shifting of the LED die with respect to the bonding pad during the heating.

Abstract translation: 一种发光二极管（LED）封装的方法包括将多个LED管芯耦合到子安装座上的对应焊盘。 具有容纳LED管芯的凹入凹槽的模具装置放置在子安装座上。 子载体，LED管芯和模具装置在热回流过程中被加热以将LED管芯接合到接合焊盘。 每个凹槽在加热期间基本上限制相对于接合焊盘的LED管芯的移位。

公开(公告)号：US08237231B2

公开(公告)日：2012-08-07

申请号：US13327992

申请日：2011-12-16

Applicant: Kuo Bin Huang ,  Ssu-Yi Li ,  Ryan Chia-Jen Chen ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Kuo Bin Huang ,  Ssu-Yi Li ,  Ryan Chia-Jen Chen ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L27/088

CPC classification number: H01L21/823842 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28247 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

Abstract: A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first aluminum layer on the first metal layer. The first aluminum layer includes an interfacial layer including aluminum, nitrogen and oxygen. The device also includes a second type field-effect transistor having a second gate including: the high k dielectric material on the substrate, a second metal layer on the high k dielectric material layer and having a second work function different from the first work function, and a second aluminum layer on the second metal layer.

Abstract translation: 具有金属栅极结构的半导体结构包括具有第一栅极的第一型场效应晶体管，包括：基板上的高k电介质材料，高k电介质材料层上的第一金属层，具有第一功函数，以及 在第一金属层上的第一铝层。 第一铝层包括包含铝，氮和氧的界面层。 该器件还包括具有第二栅极的第二类场效应晶体管，其包括：衬底上的高k电介质材料，高k电介质材料层上的第二金属层，具有不同于第一功函数的第二功函数， 和在第二金属层上的第二铝层。

公开(公告)号：US08188447B2

公开(公告)日：2012-05-29

申请号：US12359682

申请日：2009-01-26

Applicant: Chung-Ru Yang ,  Chyi Shyuan Chern ,  Soon Kang Huang

Inventor： Chung-Ru Yang ,  Chyi Shyuan Chern ,  Soon Kang Huang

IPC: A61N5/00 ,  G21G5/00

CPC classification number: H01L21/268 ,  H01L21/28185 ,  H01L22/14 ,  H01L22/20 ,  H01L22/34

Abstract: A method includes dividing a semiconductor wafer into a plurality of dies areas, generating a map of the semiconductor wafer, scanning each of the plurality of die areas of the semiconductor wafer with a laser, and adjusting a parameter of the laser during the scanning based on a value of the die areas identified by the map of the semiconductor wafer. The map characterizing the die areas based on a first measurement of each individual die area.

Abstract translation: 一种方法包括将半导体晶片分成多个管芯区域，产生半导体晶片的映射图，用激光扫描半导体晶片的多个管芯区域中的每一个，并且在扫描期间调整激光器的参数，基于 由半导体晶片的映射图识别的管芯区域的值。 基于每个单个管芯区域的第一测量来描绘管芯区域的地图。

公开(公告)号：US20120119228A1

公开(公告)日：2012-05-17

申请号：US12944895

申请日：2010-11-12

Applicant: Hsing-Kuo Hsia ,  Chih-Kuang Yu ,  Hung-Yi Kuo ,  Chyi Shyuan Chern

Inventor： Hsing-Kuo Hsia ,  Chih-Kuang Yu ,  Hung-Yi Kuo ,  Chyi Shyuan Chern

IPC: H01L33/00

CPC classification number: H01L33/64 ,  H01L25/075 ,  H01L33/54 ,  H01L33/58 ,  H01L33/641 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/00014

Abstract: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings.

Abstract translation: 一种装置包括其中具有多个开口的晶片。 对于每个开口，LED器件以这样的方式耦合到导电载体和晶片，使得每个耦合的LED器件和导电载体的一部分至少部分地填充开口。 制造LED器件的方法包括在晶片中形成多个开口。 该方法还包括将发光二极管（LED）器件耦合到导电载体上。 具有导电载体的LED装置至少部分地填充每个开口。

公开(公告)号：US20120104435A1

公开(公告)日：2012-05-03

申请号：US12912900

申请日：2010-10-27

Applicant: Hsiao-Wen LEE ,  Shang-Yu TSAI ,  Tien-Ming LIN ,  Chyi Shyuan CHERN ,  Hsin-Hsien WU ,  Fu-Wen LIU ,  Huai-En LAI ,  Yu-Sheng TANG

Inventor： Hsiao-Wen LEE ,  Shang-Yu TSAI ,  Tien-Ming LIN ,  Chyi Shyuan CHERN ,  Hsin-Hsien WU ,  Fu-Wen LIU ,  Huai-En LAI ,  Yu-Sheng TANG

IPC: H01L33/50 ,  H01L23/24

CPC classification number: H01L33/54 ,  H01L33/44 ,  H01L33/504 ,  H01L33/507 ,  H01L33/56 ,  H01L2224/48091 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2933/005 ,  H01L2924/00 ,  H01L2924/00014

Abstract: Two or more molded ellipsoid lenses are formed on a packaged LED die by injecting a glue material into a mold over the LED die and curing the glue material. After curing, the refractive index of the lens in contact with the LED die is greater than the refractive index of the lens not directly contacting the LED die. At least one phosphor material is incorporated into the glue material for at least one of the lenses not directly contacting the LED die. The lens directly contacting the LED die may also include one or more phosphor material. A high refractive index coating may be applied between the LED die and the lens.

Abstract translation: 在封装的LED模具上形成两个或多个模制的椭圆体透镜，该胶片通过将胶料注入到LED模具中的模具中并固化胶料。 固化后，与LED芯片接触的透镜的折射率大于不直接接触LED芯片的透镜的折射率。 对于不直接接触LED管芯的透镜中的至少一个，将至少一种磷光体材料结合到胶合材料中。 直接接触LED芯片的透镜还可以包括一种或多种荧光体材料。 可以在LED管芯和透镜之间施加高折射率涂层。

公开(公告)号：US08119473B2

公开(公告)日：2012-02-21

申请号：US12651017

申请日：2009-12-31

Applicant: Kuo Bin Huang ,  Ssu-Yi Li ,  Ryan Chia-Jen Chen ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Kuo Bin Huang ,  Ssu-Yi Li ,  Ryan Chia-Jen Chen ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L21/8232

CPC classification number: H01L21/823842 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28247 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

Abstract: The present disclosure also provides another embodiment of a method for making metal gate stacks. The method includes forming a first dummy gate and a second dummy gate on a substrate; removing a polysilicon layer from the first dummy gate, resulting in a first gate trench; forming a first metal layer and a first aluminum layer in the first gate trench; applying a chemical mechanical polishing (CMP) process to the substrate; performing an annealing process to the first aluminum layer using a nitrogen and oxygen containing gas, forming an interfacial layer of aluminum, nitrogen and oxygen on the first aluminum layer; thereafter removing the polysilicon layer from the second dummy gate, resulting in a second gate trench; and forming a second metal layer and a second aluminum layer on the second metal layer in the second gate trench.

Abstract translation: 本公开还提供了制造金属栅极叠层的方法的另一个实施例。 该方法包括在衬底上形成第一虚拟栅极和第二虚拟栅极; 从第一伪栅极去除多晶硅层，产生第一栅极沟槽; 在所述第一栅极沟槽中形成第一金属层和第一铝层; 对基材进行化学机械抛光（CMP）工艺; 使用含氮和氧的气体对所述第一铝层进行退火处理，在所述第一铝层上形成铝，氮和氧的界面层; 然后从第二伪栅极去除多晶硅层，产生第二栅极沟槽; 以及在所述第二栅极沟槽中的所述第二金属层上形成第二金属层和第二铝层。

公开(公告)号：US20110195570A1

公开(公告)日：2011-08-11

申请号：US12702525

申请日：2010-02-09

Applicant: Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Simon Su-Horng Lin ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L21/3205

CPC classification number: H01L29/78 ,  C23C14/022 ,  C23C14/046 ,  C23C14/18 ,  C23C14/221 ,  C23C16/0263 ,  C23C16/045 ,  C23C16/06 ,  C23C16/48 ,  C23C16/484 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76865 ,  H01L21/76877 ,  H01L29/4966 ,  H01L29/66545

Abstract: The described embodiments of methods of bottom-up metal deposition to fill interconnect and replacement gate structures enable gap-filling of fine features with high aspect ratios without voids and provide metal films with good film quality. In-situ pretreatment of metal film(s) deposited by gas cluster ion beam (GCIB) allows removal of surface impurities and surface oxide to improve adhesion between an underlying layer with the deposited metal film(s). Metal films deposited by photo-induced chemical vapor deposition (PI-CVD) using high energy of low-frequency light source(s) at relatively low temperature exhibit liquid-like nature, which allows the metal films to fill fine feature from bottom up. The post deposition annealing of metal film(s) deposited by PI-CVD densifies the metal film(s) and removes residual gaseous species from the metal film(s). For advanced manufacturing, such bottom-up metal deposition methods address the challenges of gap-filling of fine features with high aspect ratios.

Abstract translation: 自下而上金属沉积以填充互连和替代栅极结构的方法的所述实施例使得能够在没有空隙的情况下间隙填充具有高纵横比的精细特征，并提供具有良好膜质量的金属膜。 通过气体簇离子束（GCIB）沉积的金属膜的原位预处理允许去除表面杂质和表面氧化物以改善下层与沉积的金属膜之间的粘附。 通过使用高能量的低频光源在较低温度下通过光致化学气相沉积（PI-CVD）沉积的金属膜表现出液体性质，这允许金属膜从下向上填充精细特征。 通过PI-CVD沉积的金属膜的后沉积退火致密化金属膜并从金属膜去除残余的气态物质。 对于先进的制造，这种自下而上的金属沉积方法解决了具有高纵横比的精细特征的间隙填充的挑战。

公开(公告)号：US20110156166A1

公开(公告)日：2011-06-30

申请号：US12651017

申请日：2009-12-31

Applicant: Kuo Bin Huang ,  Ssu-Yi Li ,  Ryan Chia-Jen Chen ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

Inventor： Kuo Bin Huang ,  Ssu-Yi Li ,  Ryan Chia-Jen Chen ,  Chi-Ming Yang ,  Chyi Shyuan Chern ,  Chin-Hsiang Lin

IPC: H01L27/088 ,  H01L21/8234

CPC classification number: H01L21/823842 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28247 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

Abstract: The present disclosure also provides another embodiment of a method for making metal gate stacks. The method includes forming a first dummy gate and a second dummy gate on a substrate; removing a polysilicon layer from the first dummy gate, resulting in a first gate trench; forming a first metal layer and a first aluminum layer in the first gate trench; applying a chemical mechanical polishing (CMP) process to the substrate; performing an annealing process to the first aluminum layer using a nitrogen and oxygen containing gas, forming an interfacial layer of aluminum, nitrogen and oxygen on the first aluminum layer; thereafter removing the polysilicon layer from the second dummy gate, resulting in a second gate trench; and forming a second metal layer and a second aluminum layer on the second metal layer in the second gate trench.

Abstract translation: 本公开还提供了制造金属栅极叠层的方法的另一个实施例。 该方法包括在衬底上形成第一虚拟栅极和第二虚拟栅极; 从第一伪栅极去除多晶硅层，产生第一栅极沟槽; 在所述第一栅极沟槽中形成第一金属层和第一铝层; 对基材进行化学机械抛光（CMP）工艺; 使用含氮和氧的气体对所述第一铝层进行退火处理，在所述第一铝层上形成铝，氮和氧的界面层; 然后从第二虚拟栅极去除多晶硅层，产生第二栅极沟槽; 以及在所述第二栅极沟槽中的所述第二金属层上形成第二金属层和第二铝层。

公开(公告)号：US07950983B2

公开(公告)日：2011-05-31

申请号：US12683033

申请日：2010-01-06

Applicant: Soon Kang Huang ,  Chih-Lung Lin ,  Chyi-Shyuan Chern

Inventor： Soon Kang Huang ,  Chih-Lung Lin ,  Chyi-Shyuan Chern

IPC: B24B1/00

CPC classification number: B24B37/32

Abstract: A retainer ring and a method of using the retainer ring are provided. The retainer ring has openings along a bottom surface. Grooves encompass the openings and extend to an interior portion of the retainer ring wherein a semiconductor wafer may be held. In operation, a semiconductor wafer is placed inside the retainer ring. As the retainer ring and the semiconductor wafer are moved relative to an underlying polishing pad, slurry is dispensed through the openings in the retainer ring. The grooves in the retainer ring allow the slurry to flow from the openings to the interior portion of the retainer ring and the semiconductor wafer.

Abstract translation: 提供了保持环和使用保持环的方法。 保持环具有沿底面的开口。 沟槽包围开口并延伸到保持环的内部，其中可以保持半导体晶片。 在操作中，将半导体晶片放置在保持环内。 当保持环和半导体晶片相对于下面的抛光垫移动时，通过保持环中的开口分配浆料。 保持环中的槽允许浆料从开口流到保持环和半导体晶片的内部。