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公开(公告)号：US09250877B2
公开(公告)日：2016-02-02
申请号：US14033306
申请日：2013-09-20
Applicant: Cray Inc.
Inventor： Heidi Poxon , John Levesque , Luiz DeRose , Brian H. Johnson
CPC classification number: G06F8/4443 , G06F8/30 , G06F8/314 , G06F8/423 , G06F8/443 , G06F8/456 , G06F11/3404 , G06F11/3419 , G06F11/3452
Abstract: A parallelization assistant tool system to assist in parallelization of a computer program is disclosed. The system directs the execution of instrumented code of the computer program to collect performance statistics information relating to execution of loops within the computer program. The system provides a user interface for presenting to a programmer the performance statistics information collected for a loop within the computer program so that the programmer can prioritize efforts to parallelize the computer program. The system generates inlined source code of a loop by aggressively inlining functions substantially without regard to compilation performance, execution performance, or both. The system analyzes the inlined source code to determine the data-sharing attributes of the variables of the loop. The system may generate compiler directives to specify the data-sharing attributes of the variables.
Abstract translation: 公开了一种用于协助计算机程序并行化的并行化辅助工具系统。 系统指导计算机程序的检测代码的执行，以收集与计算机程序中的循环执行相关的性能统计信息。 该系统提供一个用户界面，用于向程序员呈现为计算机程序内的一个循环收集的性能统计信息，以便程序员可以将努力的优先次序并行化计算机程序。 系统通过积极地内联函数，基本上不考虑编译性能，执行性能或两者，生成循环的内联源代码。 系统分析内联源代码以确定循环变量的数据共享属性。 系统可以生成编译器指令来指定变量的数据共享属性。
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公开(公告)号：US09185828B2
公开(公告)日：2015-11-10
申请号：US13836873
申请日：2013-03-15
Applicant: Cray Inc.
Inventor： Corey Knudsen , Kent T. McDaniel , Bradley J. Smith , Gregory W. Pautsch , Eric D. Lakin
IPC: H05K7/20
CPC classification number: H05K7/20681 , H05K7/20154 , H05K7/20336 , H05K7/20818
Abstract: A system and method for cooling a plurality of connectors interfacing electrical and optical signals to circuit boards in an electronics cabinet, such as backplane connectors routing signals to circuit boards housed in card cage assemblies. Heat pipes coupled to the connectors efficiently remove heat from the connectors and sink the connector heat to a cold junction of a liquid cooling system, which cooling system may also extract heat from air flow cooling the circuit boards such that the system is room neutral, meaning that the ambient temperature remains constant during operation of the system. The heat connector cooling system is effective where connectors are outside of an air flow cooling envelope that may cool the circuit boards.
Abstract translation: 用于冷却将电和光信号连接到电子柜中的电路板的多个连接器的系统和方法，诸如背板连接器将信号路由到容纳在卡笼组件中的电路板。 耦合到连接器的热管有效地从连接器移除热量并将连接器热量吸收到液体冷却系统的冷连接处，该冷却系统还可以从冷却电路板的空气流中提取热量，使得系统为室内空气，意味着 在系统运行期间环境温度保持不变。 热连接器冷却系统是有效的，其中连接器在可能冷却电路板的气流冷却外壳之外。
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13.发明申请公开(公告)号：US20140244968A1
公开(公告)日：2014-08-28
申请号：US13781285
申请日：2013-02-28
Applicant: Cray Inc.
Inventor： Terry D. Greyzck , William R. Fulton , David W. Oehmke , Gary W. Elsesser
IPC: G06F15/76
CPC classification number: G06F15/76 , G06F8/20 , G06F8/30 , G06F8/36 , G06F8/41 , G06F9/30072 , G06F9/3851
Abstract: A system implementing a method for generating code for execution based on a SIMT model with parallel units of threads is provided. The system identifies a loop within a program that includes vector processing. The system generates instructions for a thread that include an instruction to set a predicate based on whether the thread of a parallel unit corresponds to a vector element. The system also generates instructions to perform the vector processing via scalar operations predicated on the predicate. As a result, the system generates instructions to perform the vector processing but to avoid branch divergence within the parallel unit of threads that would be needed to check whether a thread corresponds to a vector element.
Abstract translation: 提供了一种实现基于具有并行的线程单元的SIMT模型来生成用于执行代码的方法的系统。 系统识别程序内包含向量处理的循环。 该系统为线程生成指令，该线程包括基于并行单元的线程是否对应于向量元素来设置谓词的指令。 该系统还生成指令，以通过基于谓词的标量运算执行向量处理。 因此，系统产生执行向量处理的指令，但是避免在线程的并行单元内的分支发散，以检查线程是否对应于向量元素。
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14.发明申请公开(公告)号：US20130301219A1
公开(公告)日：2013-11-14
申请号：US13836873
申请日：2013-03-15
Applicant: CRAY INC.
Inventor： Corey Knudsen , Kent T. McDaniel , Bradley J. Smith , Gregory W. Pautsch , Eric D. Lakin
IPC: H05K7/20
CPC classification number: H05K7/20681 , H05K7/20154 , H05K7/20336 , H05K7/20818
Abstract: A system and method for cooling a plurality of connectors interfacing electrical and optical signals to circuit boards in an electronics cabinet, such as backplane connectors routing signals to circuit boards housed in card cage assemblies. Heat pipes coupled to the connectors efficiently remove heat from the connectors and sink the connector heat to a cold junction of a liquid cooling system, which cooling system may also extract heat from air flow cooling the circuit boards such that the system is room neutral, meaning that the ambient temperature remains constant during operation of the system. The heat connector cooling system is effective where connectors are outside of an air flow cooling envelope that may cool the circuit boards.
Abstract translation: 用于冷却将电和光信号连接到电子柜中的电路板的多个连接器的系统和方法，诸如背板连接器将信号路由到容纳在卡笼组件中的电路板。 耦合到连接器的热管有效地从连接器移除热量并将连接器热量吸收到液体冷却系统的冷连接处，该冷却系统还可以从冷却电路板的空气流中提取热量，使得系统为室内空气，意味着 在系统运行期间环境温度保持不变。 热连接器冷却系统是有效的，其中连接器在可能冷却电路板的气流冷却外壳之外。
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公开(公告)号：US20130128459A1
公开(公告)日：2013-05-23
申请号：US13681188
申请日：2012-11-19
Applicant: Cray Inc.
Inventor： Gregory W. Pautsch , Eric D. Lakin
IPC: H05K7/20
CPC classification number: H05K7/20781 , H05K7/20572 , H05K7/20736 , H05K7/20836
Abstract: A system and method for cooling a plurality of electronics cabinets having horizontally positioned electronics assemblies. The system includes at least one blower configured to direct air horizontally across the electronics assemblies, and at least one intercooler configured to extract heat from the air flow such that the system is room neutral, meaning that the ambient temperature remains constant during operation of the system. A plurality of chassis backplanes and power supplies may also include an intercooler, wherein the intercoolers are electronically controlled such that the system is room neutral.
Abstract translation: 一种用于冷却具有水平定位的电子组件的多个电子柜的系统和方法。 该系统包括至少一个鼓风机，其构造成水平地引导空气通过电子组件，以及至少一个中间冷却器，其构造成从空气流中提取热量，使得系统处于空气中性，这意味着环境温度在系统运行期间保持恒定 。 多个底盘背板和电源还可以包括中间冷却器，其中中间冷却器被电子控制，使得系统为室内空档。
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Patent Agency Ranking
公开(公告)号：US20040233752A1
公开(公告)日：2004-11-25
申请号：US10848690
申请日：2004-05-17
Applicant: Cray Inc.
Inventor： Jan A. Wikstrom
IPC: G11C007/00
CPC classification number: H03K19/01728
Abstract: A method and apparatus of precharging data and/or address lines each having a large number of loads to a voltage midway between high and low using a source-follower configuration, and optionally driving only one-half of the precharge circuit based on a previous logical value on the line being precharged. In some embodiments, a driver circuit drives an output node either high or low during a first phase of each clock cycle, and a precharge circuit then precharges the output node to an intermediate voltage during a second phase of the clock cycle in preparation for the following clock cycle. Some embodiments include source-follower configured FETs to precharge, wherein these FETs turn off once the output voltage reaches an intermediate value.
Abstract translation: 一种使用源跟随器配置将每个具有大量负载的数据和/或地址线预充电到高电平和低电压之间的电压的方法和装置，并且可选地仅基于先前的逻辑来驱动预充电电路的一半 在线上的价值被预先充电。 在一些实施例中，驱动器电路在每个时钟周期的第一阶段期间驱动输出节点为高电平或低电平，并且预充电电路然后在时钟周期的第二阶段期间将输出节点预充电到中间电压，以准备以下 时钟周期。 一些实施例包括用于预充电的源极跟随器配置的FET，其中一旦输出电压达到中间值，这些FET就关闭。
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公开(公告)号：US11567767B2
公开(公告)日：2023-01-31
申请号：US16944141
申请日：2020-07-30
Applicant: Marvell Asia Pte, Ltd. , Cray Inc.
Inventor： Harold Wade Cain, III , Rabin Andrew Sugumar , Nagesh Bangalore Lakshminarayana , Daniel Jonathan Ernst , Sanyam Mehta
Abstract: A system for processing gather and scatter instructions can implement a front-end subsystem, a back-end subsystem, or both. The front-end subsystem includes a prediction unit configured to determine a predicted quantity of coalesced memory access operations required by an instruction. A decode unit converts the instruction into a plurality of access operations based on the predicted quantity, and transmits the plurality of access operations and an indication of the predicted quantity to an issue queue. The back-end subsystem includes a load-store unit that receives a plurality of access operations corresponding to an instruction, determines a subset of the plurality of access operations that can be coalesced, and forms a coalesced memory access operation from the subset. A queue stores multiple memory addresses for a given load-store entry to provide for execution of coalesced memory accesses.
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公开(公告)号：US10903543B2
公开(公告)日：2021-01-26
申请号：US15370498
申请日：2016-12-06
Applicant: Cray Inc.
Inventor： Andy Becker
Abstract: Signal transmission structures within a printed circuit are formed to have reduced loss by making specific accommodations to reduce the surface roughness of an adjacent power plane, and thereby reducing the effects of magnetically induced currents. The power plane structure will retain sufficient surface roughness to accommodate manufacturing operations, while also contributing to reduced signal transmission losses in the adjacent signal transmission structure. The transmission structures thereby being capable of more efficiently transmitting high speed signals without undesired attenuation and loss.
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公开(公告)号：US20190042435A1
公开(公告)日：2019-02-07
申请号：US15913749
申请日：2018-03-06
Applicant: Cray Inc.
Inventor： Sanyam Mehta , James Robert Kohn , Daniel Jonathan Ernst , Heidi Lynn Poxon , Luiz DeRose
IPC: G06F12/0862 , G06F12/1045
Abstract: A method for prefetching data into a cache is provided. The method allocates an outstanding request buffer (“ORB”). The method stores in an address field of the ORB an address and a number of blocks. The method issues prefetch requests for a degree number of blocks starting at the address. When a prefetch response is received for all the prefetch requests, the method adjusts the address of the next block to prefetch and adjusts the number of blocks remaining to be retrieved and then issues prefetch requests for a degree number of blocks starting at the adjusted address. The prefetching pauses when a maximum distance between the reads of the prefetched blocks and the last prefetched block is reached. When a read request for a prefetched block is received, the method resumes prefetching when a resume criterion is satisfied.
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公开(公告)号：US10185659B2
公开(公告)日：2019-01-22
申请号：US15374114
申请日：2016-12-09
Applicant: Cray, Inc.
Inventor： Heidi Lynn Poxon , William Homer , David W. Oehmke , Luiz DeRose , Clayton D. Andreasen , Sanyam Mehta
Abstract: A system is provided for allocating memory for data of a program for execution by a computer system with a multi-tier memory that includes LBM and HBM. The system accesses a data structure map that maps data structures of the program to the memory addresses within an address space of the program to which the data structures are initially allocated. The system executes the program to collect statistics relating to memory requests and memory bandwidth utilization of the program. The system determines an extent to which each data structure is used by a high memory utilization portion of the program based on the data structure map and the collected statistics. The system generates a memory allocation plan that favors allocating data structures in HBM based on the extent to which the data structures are used by a high memory utilization portion of the program.
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