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    NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF
    11.
    发明申请
    NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    氮化物半导体基板及其制造方法

    公开(公告)号：US20110143525A1

    公开(公告)日：2011-06-16

    申请号：US13031425

    申请日：2011-02-21

    Applicant: Doo-Soo Kim ,  Ho-Jun Lee ,  Yong-Jin Kim ,  Dong-Kun Lee

    Inventor： Doo-Soo Kim ,  Ho-Jun Lee ,  Yong-Jin Kim ,  Dong-Kun Lee

    IPC: H01L21/365

    CPC classification number: H01L21/02658 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02428 ,  H01L21/0254

    Abstract: The present invention relates to a nitride semiconductor substrate such as gallium nitride substrate and a method for manufacturing the same. The present invention forms a plurality of trenches on a lower surface of a base substrate that are configured to absorb or reduce stresses applied larger when growing a nitride semiconductor film on the base substrate from a central portion of the base substrate towards a peripheral portion. That is, the present invention forms the trenches on the lower surface of the base substrate such that pitches get smaller or widths or depths get larger from the central portion of the base substrate towards the peripheral portion.

    Abstract translation: 氮化镓半导体衬底及其制造方法技术领域本发明涉及氮化镓衬底等氮化物半导体衬底及其制造方法。 本发明在基底基板的下表面上形成多个沟槽，该多个沟槽被配置为当从基底基板的中心部朝向周边部分生长氮化物半导体膜时吸收或减小施加更大的应力。 也就是说，本发明在基底基板的下表面上形成沟槽，使得间距变得较小，或者宽度或深度从基底基板的中心部朝向周边部分变大。

    Thin film transistor array substrate and manufacturing method thereof
    12.
    发明授权
    Thin film transistor array substrate and manufacturing method thereof 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US07947985B2

    公开(公告)日：2011-05-24

    申请号：US12435773

    申请日：2009-05-05

    Applicant: Dae-Cheol Kim ,  Woong-Kwon Kim ,  Sang-Youn Han ,  In-Woo Kim ,  Ho-Jun Lee ,  Byeong-Jae Ahn

    Inventor： Dae-Cheol Kim ,  Woong-Kwon Kim ,  Sang-Youn Han ,  In-Woo Kim ,  Ho-Jun Lee ,  Byeong-Jae Ahn

    IPC: H01L27/14

    CPC classification number: G02F1/136213 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

    Abstract: A thin film transistor array substrate and its manufacturing method are disclosed. A thin film transistor (TFT) includes a gate electrode formed on a substrate, and source and drain electrodes formed on the gate electrode and separated from each other. A common line made of the same material as the gate electrode is formed on the substrate. A storage capacitor includes a storage electrode connected with a storage electrode line and a pixel electrode formed on the storage electrode. The storage electrode and the pixel electrode are formed by patterning a transparent conductive film, and accordingly, light can be transmitted through the region where the storage capacitor is formed to thus increase an aperture ratio.

    Abstract translation: 公开了薄膜晶体管阵列基板及其制造方法。 薄膜晶体管（TFT）包括形成在基板上的栅极电极和形成在栅电极上并彼此分离的源极和漏极。 在基板上形成由与栅电极相同的材料构成的公共线。 存储电容器包括与存储电极线连接的存储电极和形成在存储电极上的像素电极。 存储电极和像素电极通过图案化透明导电膜而形成，因此可以通过形成存储电容器的区域透射光，从而增加开口率。

    Method of manufacturing a thin film transistor array substrate
    13.
    发明授权
    Method of manufacturing a thin film transistor array substrate 有权
    制造薄膜晶体管阵列基板的方法

    公开(公告)号：US07902006B2

    公开(公告)日：2011-03-08

    申请号：US12436356

    申请日：2009-05-06

    Applicant: Woong-Kwon Kim ,  Ho-Jun Lee ,  Hong-Kee Chin ,  Sang-Heon Song ,  Jung-Suk Bang ,  Jun-Ho Song ,  Byeong-Jae Ahn ,  Bae-Heuk Yim

    Inventor： Woong-Kwon Kim ,  Ho-Jun Lee ,  Hong-Kee Chin ,  Sang-Heon Song ,  Jung-Suk Bang ,  Jun-Ho Song ,  Byeong-Jae Ahn ,  Bae-Heuk Yim

    IPC: H01L21/00 ,  H01L21/84 ,  G02F1/1343 ,  G02F1/1333

    CPC classification number: H01L27/1288 ,  H01L27/1214 ,  H01L27/1255

    Abstract: In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.

    Abstract translation: 在制造薄膜晶体管阵列基板时，在晶体管上形成钝化膜。 在钝化膜上形成第一光致抗蚀剂图案，其中第一部分部分地覆盖每个晶体管的至少一个源极/漏电极并且覆盖每个像素电极区域，并且具有比第一部分更厚的第二部分。 使用第一光致抗蚀剂图案作为掩模来图案化钝化膜。 去除第一光致抗蚀剂图案的第一部分以形成在像素电极区域周围向上突出的第二光致抗蚀剂图案。 透明导电膜在像素电极区域中形成有凹陷。 在每个像素电极区域中的透明膜上形成掩模图案，掩模图案的顶表面在透明膜的顶部之下。 使用掩模图案作为掩模来对透明膜进行图案化以形成像素电极。

    METHOD FOR PREPARING COMPOUND SEMICONDUCTOR SUBSTRATE
    14.
    发明申请
    METHOD FOR PREPARING COMPOUND SEMICONDUCTOR SUBSTRATE 有权
    制备化合物半导体基板的方法

    公开(公告)号：US20100330784A1

    公开(公告)日：2010-12-30

    申请号：US12878225

    申请日：2010-09-09

    Applicant: Ho-Jun LEE ,  Yong-Jin KIM ,  Dong-Kun LEE ,  Doo-Soo KIM ,  Ji-Hoon KIM

    Inventor： Ho-Jun LEE ,  Yong-Jin KIM ,  Dong-Kun LEE ,  Doo-Soo KIM ,  Ji-Hoon KIM

    IPC: H01L21/20

    CPC classification number: H01L21/0254 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/0242 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/02664

    Abstract: Provided is a method for preparing a compound semiconductor substrate. The method includes coating a plurality of spherical balls on a substrate, growing a compound semiconductor epitaxial layer on the substrate coated with the spherical balls while allowing voids to be formed under the spherical balls, and cooling the substrate on which the compound semiconductor epitaxial layer is grown so that the substrate and the compound semiconductor epitaxial layer are self-separated along the voids. The spherical ball treatment can reduce dislocation generations. In addition, because the substrate and the compound semiconductor epitaxial layer are separated through the self-separation, there is no need for laser lift-off process.

    Abstract translation: 提供了一种制备化合物半导体衬底的方法。 该方法包括在基板上涂覆多个球形球，在涂覆有球形球的基材上生长化合物半导体外延层，同时允许在球形球下方形成空隙，并且冷却其上化合物半导体外延层为 生长，使得衬底和化合物半导体外延层沿着空隙自我分离。 球形球处理可以减少错位几代。 此外，由于基板和化合物半导体外延层通过自分离分离，因此不需要激光剥离处理。

    Method for manufacturing gallium nitride single crystalline substrate using self-split
    17.
    发明授权
    Method for manufacturing gallium nitride single crystalline substrate using self-split 有权
    使用自分割制造氮化镓单晶衬底的方法

    公开(公告)号：US07723217B2

    公开(公告)日：2010-05-25

    申请号：US12332198

    申请日：2008-12-10

    Applicant: Ho-Jun Lee ,  Doo-Soo Kim ,  Dong-Kun Lee ,  Yong-Jin Kim

    Inventor： Ho-Jun Lee ,  Doo-Soo Kim ,  Dong-Kun Lee ,  Yong-Jin Kim

    IPC: H01L21/20

    CPC classification number: C30B29/406 ,  C30B25/18

    Abstract: The present invention relates to a method for manufacturing a gallium nitride single crystalline substrate, including (a) growing a gallium nitride film on a flat base substrate made of a material having a smaller coefficient of thermal expansion than gallium nitride and cooling the gallium nitride film to bend convex upwards the base substrate and the gallium nitride film and create cracks in the gallium nitride film; (b) growing a gallium nitride single crystalline layer on the crack-created gallium nitride film located on the convex upward base substrate; and (c) cooling a resultant product having the grown gallium nitride single crystalline layer to make the convex upward resultant product flat or bend convex downwards the convex upward resultant product and at the same time to self-split the base substrate and the gallium nitride single crystalline layer from each other at the crack-created gallium nitride film interposed therebetween.

    Abstract translation: 本发明涉及一种用于制造氮化镓单晶衬底的方法，包括（a）在具有比氮化镓更小的热膨胀系数的材料制成的平坦基底衬底上生长氮化镓膜并冷却氮化镓膜 使基底和氮化镓膜向上弯曲并在氮化镓膜中产生裂纹; （b）在位于凸起的上方的基底基板上的裂纹产生的氮化镓膜上生长氮化镓单晶层; 和（c）冷却具有生长的氮化镓单晶层的所得产物，以使凸起的上升产物平坦或向上凸起向上凸起的产生产物，同时使基底和氮化镓单层自分裂 在其间形成的裂纹产生的氮化镓膜彼此相互结合。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
    19.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US20090309101A1

    公开(公告)日：2009-12-17

    申请号：US12435773

    申请日：2009-05-05

    Applicant: Dae-Cheol KIM ,  Woong-Kwon KIM ,  Sang-Youn HAN ,  In-Woo KIM ,  Ho-Jun LEE ,  Byeong-Jae AHN

    Inventor： Dae-Cheol KIM ,  Woong-Kwon KIM ,  Sang-Youn HAN ,  In-Woo KIM ,  Ho-Jun LEE ,  Byeong-Jae AHN

    IPC: H01L33/00 ,  H01L21/336

    CPC classification number: G02F1/136213 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/1288

    Abstract: A thin film transistor array substrate and its manufacturing method are disclosed. A thin film transistor (TFT) includes a gate electrode formed on a substrate, and source and drain electrodes formed on the gate electrode and separated from each other. A common line made of the same material as the gate electrode is formed on the substrate. A storage capacitor includes a storage electrode connected with a storage electrode line and a pixel electrode formed on the storage electrode. The storage electrode and the pixel electrode are formed by patterning a transparent conductive film, and accordingly, light can be transmitted through the region where the storage capacitor is formed to thus increase an aperture ratio.

    Abstract translation: 公开了薄膜晶体管阵列基板及其制造方法。 薄膜晶体管（TFT）包括形成在基板上的栅极电极和形成在栅电极上并彼此分离的源极和漏极。 在基板上形成由与栅电极相同的材料构成的公共线。 存储电容器包括与存储电极线连接的存储电极和形成在存储电极上的像素电极。 存储电极和像素电极通过图案化透明导电膜而形成，因此可以通过形成存储电容器的区域透射光，从而增加开口率。

    Optical Compensator Film for Lcd Via Multilayer Structure
    20.
    发明申请
    Optical Compensator Film for Lcd Via Multilayer Structure 审中-公开
    用于Lcd通过多层结构的光学补偿膜

    公开(公告)号：US20070273817A1

    公开(公告)日：2007-11-29

    申请号：US10593621

    申请日：2005-09-23

    Applicant: Ho-jun Lee ,  Dong-ryul Kim ,  Sang-uk Ryu ,  Hee-jung Kim ,  Gi-cheul Kim

    Inventor： Ho-jun Lee ,  Dong-ryul Kim ,  Sang-uk Ryu ,  Hee-jung Kim ,  Gi-cheul Kim

    IPC: G02F1/1335

    CPC classification number: G02F1/133634 ,  G02B5/3083 ,  G02F2413/14

    Abstract: The present invention relates to a compensator film having multilayer structure including both negative optical retardation in thickness direction and optical retardation in in-plane direction at the same time to improve wide view angle, in which a polymer base layer provides optical retardation in in-plane direction, organic or organic/inorganic hybrid protective layer formed on the base layer contributes to the improvement of mechanical properties such as curl prevention and polymer orientation of coating layer, and the out-most layer, a polymer coating layer, endows optical retardation in thickness direction. The multilayer, in which each layer is individually functioning, enables the preparation of a compensator film having proper optical retardation.

    Abstract translation: 本发明涉及具有多层结构的补偿膜，该层叠结构包括厚度方向上的负光学延迟和面内方向上的光学延迟同时改善宽视角，其中聚合物基层在平面内提供光学延迟 形成在基层上的方向，有机或无机/无机混合保护层有助于提高涂层防止卷曲和聚合物取向等机械性能，最外层聚合物涂层使得光学延迟的厚度 方向。 每个层单独起作用的多层能够制备具有适当的光学延迟的补偿膜。

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