公开(公告)号：US06810492B2

公开(公告)日：2004-10-26

申请号：US10430851

申请日：2003-05-06

Applicant: Richard R. Weber ,  Corey L. Larsen ,  James J. Howarth

Inventor： Richard R. Weber ,  Corey L. Larsen ,  James J. Howarth

IPC: G06F1100

CPC classification number: G11C29/886 ,  G11C29/824 ,  G11C29/88

Abstract: A memory module using a plurality of partially defective RDRAM devices in combination to simulate a single, fully operational RDRAM device. Multiple, partially defective RDRAM devices are configured to simulate a fully operational RDRAM device by taking advantage of the manner in which defective cells are localized on each RDRAM device.

Abstract translation: 组合使用多个部分有缺陷的RDRAM设备以模拟单个完全可操作的RDRAM设备的存储器模块。 多个部分有缺陷的RDRAM设备被配置为通过利用有缺陷单元被定位在每个RDRAM设备上的方式来模拟完全可操作的RDRAM设备。

公开(公告)号：US07953911B2

公开(公告)日：2011-05-31

申请号：US12862648

申请日：2010-08-24

Applicant: James J. Howarth ,  Robert A. Hutchins

Inventor： James J. Howarth ,  Robert A. Hutchins

IPC: G06F13/12

CPC classification number: G11B20/10009 ,  G11B20/10027 ,  G11B20/10046 ,  G11B20/10074 ,  G11B20/10175 ,  G11B20/10222 ,  G11B20/10425 ,  G11B20/10481 ,  G11B2020/10675 ,  G11B2020/10759 ,  G11B2220/2537 ,  G11B2220/41 ,  G11B2220/90

Abstract: A method and apparatus to read information from an information storage medium using a read channel, where that read channel includes a data cache. The invention generates an analog waveform comprising the information, and provides that analog waveform to a read channel, and generates a digital signal from that analog waveform using one or more first operating parameters. The method error corrects that digital signal at an actual error correction rate, and determines if the actual error correction rate is greater than an error correction rate threshold. If the actual error correction rate exceeds the error correction rate threshold, then the method captures the digital signal, stores that captured data in a data cache, reads that digital signal from the cache, generates one or more second operating parameters, and provides those one or more second operating parameters to the read channel. Thereafter, the method uses those one or more second operating parameters to read the information from the information storage medium.

Abstract translation: 一种使用读通道从信息存储介质读取信息的方法和装置，其中该读通道包括数据高速缓存。 本发明产生包括该信息的模拟波形，并将该模拟波形提供给读通道，并使用一个或多个第一操作参数从该模拟波形生成数字信号。 方法误差以实际的纠错率校正数字信号，并确定实际的纠错率是否大于纠错率阈值。 如果实际的纠错率超过纠错率阈值，则该方法捕获数字信号，将捕获的数据存储在数据高速缓存中，从高速缓存中读取该数字信号，产生一个或多个第二操作参数，并提供那些 或更多的第二操作参数。 此后，该方法使用这些一个或多个第二操作参数来从信息存储介质读取信息。

公开(公告)号：US07212482B2

公开(公告)日：2007-05-01

申请号：US10306989

申请日：2002-11-29

Applicant: James J. Howarth ,  Robert A. Hutchins

Inventor： James J. Howarth ,  Robert A. Hutchins

IPC: G11B7/00

CPC classification number: H04L27/08

Abstract: A method and apparatus to dynamically adjust the amplitude of a signal comprising information read from an information storage medium. The method first forms (N) digital signals comprising information read from an information storage medium. The method provides a first signal comprising information read an information storage medium, wherein that first signal is one of the (N) digital signals. The method provides a first gain level, and calculates a first gain adjusted signal comprising the multiplication product of the first signal and the first gain level. To dynamically adjust that gain level, Applicants' method determines a gain error. Using that gain error, Applicants' method then calculates a second gain level by multiplying the gain error times a multiplier coefficient, and adding that multiplication product to the first gain level.

Abstract translation: 一种用于动态地调整包括从信息存储介质读取的信息的信号的幅度的方法和装置。 该方法首先形成包括从信息存储介质读取的信息的（N）个数字信号。 该方法提供包括读取信息存储介质的信息的第一信号，其中该第一信号是（N）个数字信号之一。 该方法提供第一增益电平，并且计算包括第一信号和第一增益电平的乘积的第一增益调整信号。 为了动态调整增益水平，申请人的方法确定增益误差。 使用该增益误差，则申请人的方法然后通过将增益误差乘以乘数系数来计算第二增益电平，并将乘积与第一增益电平相加。

公开(公告)号：US07005754B2

公开(公告)日：2006-02-28

申请号：US10294407

申请日：2002-11-14

Applicant: James J. Howarth

Inventor： James J. Howarth

IPC: H01L23/544

CPC classification number: H05K3/303 ,  H01L23/3128 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/0002 ,  H05K1/0269 ,  H05K2201/09063 ,  H05K2201/10719 ,  H05K2203/0195 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613 ,  Y10S439/94 ,  H01L2924/00

Abstract: A method and apparatus for aligning a semiconductor device with a corresponding landing site on a carrier substrate. At least two apertures are formed in a semiconductor device, the apertures passing from a first major surface to a second, opposing major surface of the semiconductor device. Corresponding alignment features are provided on the carrier substrate at the landing site to which the semiconductor device is to be mounted. The alignment features are aligned with the corresponding apertures to effect alignment of the semiconductor device. The alignment features may include apertures corresponding in size, shape and arrangement to the semiconductor device apertures. Alignment pins may be placed through the at least two apertures to assist with alignment.

公开(公告)号：US06963143B2

公开(公告)日：2005-11-08

申请号：US10294299

申请日：2002-11-14

Applicant: James J. Howarth

Inventor： James J. Howarth

IPC: H01L23/31 ,  H01L23/544 ,  H05K1/02 ,  H05K3/30

CPC classification number: H05K3/303 ,  H01L23/3128 ,  H01L23/544 ,  H01L2223/54473 ,  H01L2924/0002 ,  H05K1/0269 ,  H05K2201/09063 ,  H05K2201/10719 ,  H05K2203/0195 ,  H05K2203/166 ,  H05K2203/167 ,  Y02P70/613 ,  Y10S439/94 ,  H01L2924/00

Abstract: A method and apparatus for aligning a semiconductor device with a corresponding landing site on a carrier substrate. At least two apertures are formed in a semiconductor device, the apertures passing from a first major surface to a second, opposing major surface of the semiconductor device. Corresponding alignment features are provided on the carrier substrate at the landing site to which the semiconductor device is to be mounted. The alignment features are aligned with the corresponding apertures to effect alignment of the semiconductor device. The alignment features may include apertures corresponding in size, shape and arrangement to the semiconductor device apertures. Alignment pins may be placed through the at least two apertures to assist with alignment.

Abstract translation: 一种用于将半导体器件与载体衬底上的对应着地点对准的方法和装置。 在半导体器件中形成至少两个孔，所述孔从半导体器件的第一主表面到第二相对的主表面。 相应的对准特征在半导体器件要被安装到的着陆位置处设置在载体基板上。 对准特征与相应的孔对准以实现半导体器件的对准。 对准特征可以包括对应于半导体器件孔径的尺寸，形状和布置的孔。 对准销可以通过至少两个孔布置以辅助对准。

公开(公告)号：US06819065B1

公开(公告)日：2004-11-16

申请号：US10620232

申请日：2003-07-14

Applicant: James J. Howarth ,  James M. Karp ,  John A. Koski ,  Randy C. Inch

Inventor： James J. Howarth ,  James M. Karp ,  John A. Koski ,  Randy C. Inch

IPC: B65H5938

CPC classification number: G11B15/48 ,  B65H2801/45

Abstract: An apparatus and method for the controlled dynamic braking of a DC motor in a tape transport device are provided. A PWM state device includes a plurality of state transition paths, each path having an initial state, representative of a tape profile, including a predetermined range of tape velocities, relative amounts of tape on each reel and an initial tape tension, and at least one subsequent state. When a low power event is detected, one of the state transition paths is selected, based upon a current tape profile, and an associated PWM signal is transmitted to the motor. An energy storage device provides power to the PWM state device during the low power event. The PWM signals follow the selected transition path to modulate the current generated by the motion of the motor and thereby create a decelerating force while substantially maintaining the initial tape tension.

Abstract translation: 提供了一种用于磁带传送装置中的DC电动机的受控动态制动的装置和方法。 PWM状态设备包括多个状态转移路径，每个路径具有代表磁带轮廓的初始状态，包括磁带速度的预定范围，每个磁带上的磁带的相对量和初始磁带张力，以及至少一个 后续状态。 当检测到低功率事件时，基于当前磁带简档来选择状态转换路径之一，并且将相关联的PWM信号发送到电动机。 能量存储装置在低功率事件期间向PWM状态装置供电。 PWM信号遵循所选择的过渡路径以调制由电动机的运动产生的电流，从而产生减速力，同时基本保持初始带张力。