Non-Uniform Memory Access (NUMA) Enhancements for Shared Logical Partitions
    11.
    发明申请
    Non-Uniform Memory Access (NUMA) Enhancements for Shared Logical Partitions 失效
    共享逻辑分区的非均匀内存访问(NUMA)增强功能

    公开(公告)号:US20100223622A1

    公开(公告)日:2010-09-02

    申请号:US12394669

    申请日:2009-02-27

    CPC classification number: G06F9/5077 G06F2212/2542

    Abstract: In a NUMA-topology computer system that includes multiple nodes and multiple logical partitions, some of which may be dedicated and others of which are shared, NUMA optimizations are enabled in shared logical partitions. This is done by specifying a home node parameter in each virtual processor assigned to a logical partition. When a task is created by an operating system in a shared logical partition, a home node is assigned to the task, and the operating system attempts to assign the task to a virtual processor that has a home node that matches the home node for the task. The partition manager then attempts to assign virtual processors to their corresponding home nodes. If this can be done, NUMA optimizations may be performed without the risk of reducing the performance of the shared logical partition.

    Abstract translation: 在包含多个节点和多个逻辑分区的NUMA拓扑计算机系统中,其中一些可能是专用的,其他的可以是共享的,而在共享逻辑分区中启用了NUMA优化。 这是通过在分配给逻辑分区的每个虚拟处理器中指定家庭节点参数来完成的。 当由共享逻辑分区中的操作系统创建任务时,将家庭节点分配给该任务,并且操作系统尝试将该任务分配给具有与该任务的家庭节点匹配的家庭节点的虚拟处理器 。 然后,分区管理器尝试将虚拟处理器分配给其对应的家庭节点。 如果可以这样做,可以执行NUMA优化,而不会降低共享逻辑分区的性能。

    Method and Apparatus for Protecting Encryption Keys in a Logically Partitioned Computer System Environment
    12.
    发明申请
    Method and Apparatus for Protecting Encryption Keys in a Logically Partitioned Computer System Environment 失效
    用于在逻辑分区计算机系统环境中保护加密密钥的方法和装置

    公开(公告)号:US20090214040A1

    公开(公告)日:2009-08-27

    申请号:US12038038

    申请日:2008-02-27

    CPC classification number: H04L9/088 G06F12/1408

    Abstract: In a logically partitioned computer system, a partition manager maintains and controls master encryption keys for the different partitions. Preferably, processes executing within a partition have no direct access to real memory, addresses in the partition's memory space being mapped to real memory by the partition manager. The partition manager maintains master keys at real memory addresses inaccessible to processes executing in the partitions. Preferably, a special hardware register stores a pointer to the current key, and is read only by a hardware crypto-engine to encrypt/decrypt data. The crypto-engine returns the encrypted/decrypted data, but does not output the key itself or its location.

    Abstract translation: 在逻辑分区的计算机系统中,分区管理器维护并控制不同分区的主加密密钥。 优选地,在分区内执行的处理不能直接访问实际存储器,分区的存储空间中的地址被分区管理器映射到实际存储器。 分区管理器将主密钥维护在分区中执行的进程无法访问的实际内存地址。 优选地,特殊硬件寄存器存储指向当前密钥的指针,并且仅由硬件加密引擎读取以加密/解密数据。 加密引擎返回加密/解密的数据,但不输出密钥本身或其位置。

    Microcode branch based upon operand length and alignment
    13.
    发明授权
    Microcode branch based upon operand length and alignment 失效
    微码分支基于操作数长度和对齐

    公开(公告)号:US4933847A

    公开(公告)日:1990-06-12

    申请号:US121443

    申请日:1987-11-17

    CPC classification number: G06F9/30061 G06F9/264

    Abstract: A microcode branch, to one of a number of possible control words (sixteen control words are described), is based upon (1) the remaining operand length that is to be processed by a left to right instruction, and (2) by the byte alignment of the portion of the operand that currently resides in main storage interface registers. As a left to right instruction is being executed, the operand's new length and its new alignment, as they both will exist after a control word is executed, are determined. The new length and the new alignment are used to determine the addess of the next control word. A 16-way branch instruction has branch legs that are determined by the number of operand bytes that are left to be processed, and by the alignment of two operands in two storage registers that interface with main storage. This method and arrangement for microcode branching maximizes the amount of data that can be processed per processor cycle by the hardware upon execution of a left to right instruction.

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