Abstract:
Systems, methods and computer program products for facilitating the provisioning of a single and multi-line virtual private branch exchange (PBX) including automated call distribution via a mobile device are described. In some implementations, the provisioning of the single and multi-line virtual PBX can be achieved using one or more unique provisioning interfaces. The unique provisioning interfaces can enable the setup and configuration of a virtual PBX service account instantaneously from any geographical location at anytime. Changes made to the virtual PBX service account can be immediately reflected back (e.g., in real-time) to the system providing the core operating environment.
Abstract:
An adapter having a plurality of functions and a plurality of ports, in which the mapping between functions and ports is configurable. In certain embodiments, device memory can be programmed with a desired mapping scheme that overrides a default mapping scheme for the adapter. In certain embodiments, device memory can be reprogrammed with a different desired mapping to enable the adapter to dynamically respond to system conditions.
Abstract:
Systems, methods and computer program products for generating and displaying various user interfaces for configuring one or more call handling rules associated with managing virtual PBX services rendered at an extension are described. The user interfaces can be used to configure virtual PBX services for a single- or multi-extension environment. The virtual PBX services can provide, for example, a main number, and calls made to the main number can be managed according to one or more sets of call handling rules associated with the virtual PBX services and which can be configured through the user interfaces. The user interfaces can be web-based interfaces accessible through a browser, and can be accessed only after a user or administrator has setup and activated the virtual PBX services.
Abstract:
A method and apparatus for linking two independent caches which have related information stored therein. Each unit of information stored in a first cache memory is associated with one unit of information stored in the second cache memory. Each unit of information stored in the first cache memory includes a pointer or index to the associated information unit in the second cache memory. Each information unit stored in the second cache is only stored once, regardless of the number of units in the first cache that are associated with a particular unit within the second cache. Therefore, even if more than one unit of information within the first cache memory is associated with the same unit of information within the second cache memory, that unit of information stored in the second cache memory is only stored once.
Abstract:
Method and system for protecting data in a PCI-Express device is provided. The method includes adding error correction code (ECC) to every byte of data that enters a PCI-Express Transaction Handler (“PTH”) Module and is destined for a host system memory or destined to another device, before the data is aligned within the PTH module; verifying the ECC code for every byte of the data before the data leaves the PTH module; and generating the ECC code for a data block size, wherein the data block size depends on the destination of the data.
Abstract:
An elastic bus interface receives and registers an external data transfer signal and generates an internal data transfer signal that always begins at the beginning of the subsequent clock cycle regardless of the time of arrival of the external data transfer signal. By employing a plurality of data output registers in a pipeline and using only the internal data transfer signal, data is fed to a bus so as to ensure that almost a complete clock cycle is available for setup time to accomplish data transfer. The invention can operate with high speed buses using only simple conventional circuitry and modest process geometries requiring only minimal chip area and power.
Abstract:
Systems, methods and computer program products for generating and displaying various user interfaces for configuring one or more call handling rules associated with managing virtual PBX services rendered at an extension are described. The user interfaces can be used to configure virtual PBX services for a single- or multi-extension environment. The virtual PBX services can provide, for example, a main number, and calls made to the main number can be managed according to one or more sets of call handling rules associated with the virtual PBX services and which can be configured through the user interfaces. The user interfaces can be web-based interfaces accessible through a browser, and can be accessed only after a user or administrator has setup and activated the virtual PBX services.
Abstract:
Systems, methods and computer program products for facilitating the provisioning of a single and multi-line virtual private branch exchange (PBX) including automated call distribution via a mobile device are described. In some implementations, the provisioning of the single and multi-line virtual PBX can be achieved using one or more unique provisioning interfaces. The unique provisioning interfaces can enable the setup and configuration of a virtual PBX service account instantaneously from any geographical location at anytime. Changes made to the virtual PBX service account can be immediately reflected back (e.g., in real-time) to the system providing the core operating environment.
Abstract:
A "virtual FIFO" system for use in buffering data between transacting buses that transfer data at different rates includes a memory device and a controller that partitions the memory device into multiple regions, each of which is configured to operate as a distinct data buffer.
Abstract:
A system is configured to provide an efficient management or control of a buffer memory system. The system can also be used to transmit data between communicating components of a computer system. A first-in-first-out memory stores a list of buffer pointers, and control logic returns buffer pointers from the transmit registers, and moves buffer pointers to the bottom of the FIFO memory.