公开(公告)号：US20050098338A1

公开(公告)日：2005-05-12

申请号：US11009045

申请日：2004-12-13

Applicant: Takashi Kitae ,  Tsutomu Mitani ,  Yukihiro Ishimaru ,  Hiroaki Takezawa

Inventor： Takashi Kitae ,  Tsutomu Mitani ,  Yukihiro Ishimaru ,  Hiroaki Takezawa

IPC: H01L21/60 ,  H01L23/485 ,  H05K3/32 ,  H02G3/08

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/29101 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29318 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29355 ,  H01L2224/29364 ,  H01L2224/29369 ,  H01L2224/8319 ,  H01L2224/838 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/0781 ,  H01L2924/19041 ,  H05K3/321 ,  H05K2201/10636 ,  H05K2201/10689 ,  H05K2201/10909 ,  H05K2203/0307 ,  H05K2203/1446 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299

Abstract: A surface of an external electrode 3 of an electronic part 4 is formed with a coating containing resin ingredient. Thereby, adhesion strength and reliability may be significantly improved in mounting an electronic part onto a circuit board 1 through the medium of a conductive adhesive. Further, it will be able to mount an electronic part to an element to be mounted by utilizing a conductive adhesive forming an external electrode 3 as a connecting element. Further, surface roughness (Ra) of an external electrode 3 of an electronic part is set to 0.1 μm or more and to 10.0 μm or less and preferably to 1.0 μm or more and to 5.0 μm or less. Thereby, adhesion strength with a conductive adhesive may be significantly enhanced in comparison with a conventional electronic part presented.

Abstract translation: 电子部件4的外部电极3的表面形成有含有树脂成分的涂层。 因此，通过导电粘合剂的介质将电子部件安装到电路板1上可以显着改善粘附强度和可靠性。 此外，通过利用形成作为连接元件的外部电极3的导电粘合剂，能够将电子部件安装到要安装的元件上。 此外，电子部件的外部电极3的表面粗糙度（R a1 a）设定为0.1μm以上至10.0μm以下，优选为1.0μm以上且5.0μm以下 。 因此，与传统的电子部件相比，与导电粘合剂的粘附强度可以显着提高。

公开(公告)号：US08887383B2

公开(公告)日：2014-11-18

申请号：US12518358

申请日：2007-11-27

Applicant: Yasushi Taniguchi ,  Seiichi Nakatani ,  Takashi Kitae ,  Seiji Karashima ,  Kenichi Hotehama

Inventor： Yasushi Taniguchi ,  Seiichi Nakatani ,  Takashi Kitae ,  Seiji Karashima ,  Kenichi Hotehama

IPC: H01R9/00 ,  H05K3/00 ,  H05K3/34 ,  H01L23/00 ,  H05K3/24 ,  H01L21/683

CPC classification number: H01L24/12 ,  H01L21/6835 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/11522 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/83555 ,  H01L2924/00013 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K3/244 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/0338 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/083 ,  H05K2203/087 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: An electrode structure 100 on which a solder bump is placed includes an electrode pattern 50 made of an electrode-constituting material selected from the group consisting of Cu, Al, Cr, and Ti, a Ni layer 52 formed on a part of the electrode pattern 50, a Pd layer 54 formed on at least a part of a region other than the part of the electrode pattern 50, and an Au layer 56 formed on the Ni layer 52 and the Pd layer 54.

Abstract translation: 在其上放置焊料凸块的电极结构100包括由选自Cu，Al，Cr和Ti的电极构成材料制成的电极图案50，形成在电极图案的一部分上的Ni层52 50，形成在除了电极图案50的一部分以外的区域的至少一部分上的Pd层54以及形成在Ni层52和Pd层54上的Au层56。

公开(公告)号：US08297488B2

公开(公告)日：2012-10-30

申请号：US12282774

申请日：2007-02-22

Applicant: Seiji Karashima ,  Yasushi Taniguchi ,  Seiichi Nakatani ,  Kenichi Hotehama ,  Takashi Kitae ,  Susumu Sawada

Inventor： Seiji Karashima ,  Yasushi Taniguchi ,  Seiichi Nakatani ,  Kenichi Hotehama ,  Takashi Kitae ,  Susumu Sawada

IPC: B23K31/00 ,  B23K31/02

CPC classification number: H05K3/3484 ,  H01L24/11 ,  H01L2224/11522 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01055 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K2203/0425 ,  H05K2203/083 ,  H05K2203/087 ,  H01L2924/00

Abstract: A method for forming bumps 19 on electrodes 32 of a wiring board 31 includes the steps of: (a) supplying a fluid 14 containing conductive particles 16 and a gas bubble generating agent onto a first region 17 including the electrodes 32 on the wiring board 31; (b) disposing a substrate 40 having a wall surface 45 formed near the electrodes 32 for forming a meniscus 55 of the fluid 14, so that the substrate 40 faces the wiring board 31; and (c) heating the fluid 14 to generate gas bubbles 30 from the gas bubble generating agent contained in the fluid 14.

Abstract translation: 在布线基板31的电极32上形成凸块19的方法包括以下步骤：（a）将含有导电粒子16和气泡发生剂的流体14供给到布线板31上的包括电极32的第一区域17上 ; （b）设置具有形成在电极32附近的壁面45的基板40，以形成流体14的弯液面55，使得基板40面向布线板31; 和（c）加热流体14以从包含在流体14中的气泡生成剂产生气泡30。

公开(公告)号：US20110204367A1

公开(公告)日：2011-08-25

申请号：US12672135

申请日：2008-08-06

Applicant: Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

Inventor： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

IPC: H01L33/02 ,  H01L29/786 ,  H01L21/336

CPC classification number: H01L51/057 ,  H01L27/3274 ,  H01L27/3276 ,  H01L51/0096 ,  Y02E10/549 ,  Y02P70/521

Abstract: A semiconductor device having a semiconductor elements formed with higher density is provided. Furthermore an image display device using the semiconductor device is also provided.A semiconductor device comprising a resin film that has a through hole that penetrates from one surface to the other surface thereof, a source electrode disposed along the inner wall of the through hole, a drain electrode disposed along the inner wall of the through hole, a gate electrode disposed on the other surface of the resin film opposing the through hole, an insulating layer disposed on the gate electrode at the bottom of the through hole and an organic semiconductor disposed in the through hole so as to contact the source electrode and the drain electrode, wherein the organic semiconductor makes contact with at least a part of the insulating layer at the bottom of the through hole so that a channel is formed in the organic semiconductor in the vicinity of the insulating layer that is in contact therewith.

Abstract translation: 提供了具有以更高密度形成的半导体元件的半导体器件。 此外，还提供了使用该半导体器件的图像显示装置。 一种半导体器件，包括具有从一个表面到另一个表面穿透的通孔的树脂膜，沿着通孔的内壁设置的源电极，沿该通孔的内壁设置的漏电极， 设置在与通孔相对的树脂膜的另一个表面上的栅电极，设置在通孔底部的栅电极上的绝缘层和布置在通孔中的有机半导体，以便与源电极和漏极 电极，其中有机半导体与通孔底部的绝缘层的至少一部分接触，使得在与其接触的绝缘层附近的有机半导体中形成沟道。

公开(公告)号：US20110204366A1

公开(公告)日：2011-08-25

申请号：US12672127

申请日：2008-08-06

Applicant: Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

Inventor： Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Susumu Sawada

IPC: H01L33/02 ,  H01L29/786 ,  H01L21/336

CPC classification number: H01L27/3274 ,  H01L27/283 ,  H01L27/3248 ,  H01L27/3276 ,  H01L51/0005 ,  H01L51/0558 ,  H01L2227/323

Abstract: A semiconductor device having a semiconductor elements formed with higher density is provided. Furthermore an image display device using the semiconductor device is also provided.A semiconductor device comprising a resin film that has a through hole that penetrates from one surface to the other surface thereof, an organic semiconductor disposed inside the through hole, an insulating film on one end of the organic semiconductor, a gate electrode on the insulating film, a source electrode connected electrically to the other end of the organic semiconductor and a drain electrode connected electrically to the other end of the organic semiconductor.

Abstract translation: 提供了具有以更高密度形成的半导体元件的半导体器件。 此外，还提供了使用该半导体器件的图像显示装置。 一种半导体器件，包括具有从一个表面到另一个表面穿透的通孔的树脂膜，设置在所述通孔内的有机半导体，在所述有机半导体的一端上的绝缘膜，所述绝缘膜上的栅电极 与该有机半导体的另一端电连接的源电极和与该有机半导体的另一端电连接的漏电极。

公开(公告)号：US07911064B2

公开(公告)日：2011-03-22

申请号：US11908087

申请日：2006-02-28

Applicant: Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

Inventor： Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

IPC: H01L21/44 ,  H01L23/52 ,  H01L23/40 ,  H01L23/48 ,  H01L21/00

CPC classification number: H01L24/81 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83886 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A mounted body of the present invention includes: a multilayer semiconductor chip 20 including a plurality of semiconductor chips 10 (10a, 10b) that are stacked; and a mounting board 13 on which the multilayer semiconductor chip 20 is mounted. In this mounted body, each of the semiconductor chips 10 (10a, 10b) in the multilayer semiconductor chip 20 has a plurality of element electrodes 12 (12a, 12b) on a chip surface 21 (21a, 21b) facing toward the mounting board 13. On the mounting board 13, electrode terminals 14 are formed so as to correspond to the plurality of element electrodes (12a, 12b), respectively, and the electrode terminals 14 of the mounting board and the element electrodes (12a, 12b) are connected electrically to each other via solder bump formed as a result of assembly of solder particles. With this configuration, a mounted body on which a stacked package is mounted can be manufactured easily.

Abstract translation: 本发明的安装体包括：层叠半导体芯片10（10a，10b）的多层半导体芯片20， 以及安装基板13，其上安装有多层半导体芯片20。 在该安装体中，多层半导体芯片20中的各半导体芯片10（10a，10b）在与安装基板13相对的芯片面21（21a，21b）上具有多个元件电极12（12a，12b） 在安装基板13上分别形成有与多个元件电极（12a，12b）对应的电极端子14，并且安装基板的电极端子14和元件电极（12a，12b）被连接 通过焊料颗粒的组装形成的焊锡凸块彼此电连接。 利用这种结构，可以容易地制造安装有堆叠的包装的安装体。

公开(公告)号：US20100224986A1

公开(公告)日：2010-09-09

申请号：US12728615

申请日：2010-03-22

Applicant: Toshiyuki Kojima ,  Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Shingo Komatsu

Inventor： Toshiyuki Kojima ,  Seiichi Nakatani ,  Yoshihisa Yamashita ,  Takashi Kitae ,  Shingo Komatsu

IPC: H01L23/498

CPC classification number: H01L24/81 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/25 ,  H01L24/45 ,  H01L24/48 ,  H01L24/82 ,  H01L24/83 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16058 ,  H01L2224/16059 ,  H01L2224/16105 ,  H01L2224/16106 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/171 ,  H01L2224/24011 ,  H01L2224/24225 ,  H01L2224/24226 ,  H01L2224/24227 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/82001 ,  H01L2224/83385 ,  H01L2224/83886 ,  H01L2224/83888 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/3025 ,  H01L2224/16225 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2924/00015 ,  H01L2224/81805 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.

Abstract translation: 本发明的安装体（100）包括：具有形成元件电极（12）的表面（10a）和与表面（10a）相对的后表面（10b）的半导体元件（10）。 以及安装板（30），在其上形成有各自具有电极端子（32）的布线图案（35）。 半导体元件（10）的后表面（10b）与安装板（30）接触，并且半导体元件（10）的元件电极（12）与电极端子（32）电连接 通过由组装成桥形的焊料颗粒形成的焊料连接器（20）在安装板（30）上形成的布线图案（35）。 利用这种结构，半导体元件的元件电极和安装板的电极端子之间的细间距连接成为可能。

公开(公告)号：US20100044091A1

公开(公告)日：2010-02-25

申请号：US12518358

申请日：2007-11-27

Applicant: Yasushi Taniguchi ,  Seiichi Nakatani ,  Takashi Kitae ,  Seiji Karashima ,  Kenichi Hotehama

Inventor： Yasushi Taniguchi ,  Seiichi Nakatani ,  Takashi Kitae ,  Seiji Karashima ,  Kenichi Hotehama

IPC: H05K1/11 ,  H05K3/34

CPC classification number: H01L24/12 ,  H01L21/6835 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/742 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/11522 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/16 ,  H01L2224/83555 ,  H01L2924/00013 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01051 ,  H01L2924/01056 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K3/244 ,  H05K3/3484 ,  H05K3/3489 ,  H05K2201/0338 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/083 ,  H05K2203/087 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49147 ,  Y10T29/49155 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

Abstract: An electrode structure 100 on which a solder bump is placed includes an electrode pattern 50 made of an electrode-constituting material selected from the group consisting of Cu, Al, Cr, and Ti, a Ni layer 52 formed on a part of the electrode pattern 50, a Pd layer 54 formed on at least a part of a region other than the part of the electrode pattern 50, and an Au layer 56 formed on the Ni layer 52 and the Pd layer 54.

Abstract translation: 在其上放置焊料凸块的电极结构100包括由选自Cu，Al，Cr和Ti的电极构成材料制成的电极图案50，形成在电极图案的一部分上的Ni层52 50，形成在除了电极图案50的一部分以外的区域的至少一部分上的Pd层54以及形成在Ni层52和Pd层54上的Au层56。

公开(公告)号：US07611040B2

公开(公告)日：2009-11-03

申请号：US11579505

申请日：2006-04-25

Applicant: Takashi Kitae ,  Seiichi Nakatani ,  Toshiyuki Kojima ,  Shingo Komatsu ,  Yoshihisa Yamashita

Inventor： Takashi Kitae ,  Seiichi Nakatani ,  Toshiyuki Kojima ,  Shingo Komatsu ,  Yoshihisa Yamashita

IPC: B23K31/02 ,  H01L21/44

CPC classification number: H05K3/3484 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49816 ,  H01L24/11 ,  H01L24/12 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/11003 ,  H01L2224/1152 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81141 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01009 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01045 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/09701 ,  H01L2924/15787 ,  H01L2924/15788 ,  H05K3/323 ,  H05K3/3436 ,  H05K2201/09745 ,  H05K2201/10977 ,  H05K2203/0108 ,  H05K2203/0113 ,  H05K2203/043 ,  H05K2203/0465 ,  H05K2203/167 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/29099

Abstract: A method for forming solder bumps for realizing high density mounting and a highly reliable method for mounting a semiconductor device is provided. A flat plate having a plurality of projections or recesses thereon is prepared; the flat plate is aligned to oppose an electronic component and a resin composition including a solder powder is supplied to a gap between the flat plate and the electronic component; the resin composition is annealed to melt the solder powder included in the resin composition for growing the solder powder up to the level of the surface of the flat plate by allowing the melted solder powder to self-assemble on terminals, so as to form solder bumps on the terminals; and the flat plate is removed after cooling and solidifying the solder bumps. Thus, the solder bumps having pits corresponding to the projections or having protrusions corresponding to the recesses are formed.

Abstract translation: 提供一种用于形成用于实现高密度安装的焊料凸块的方法和用于安装半导体器件的高可靠性方法。 制备其上具有多个突起或凹部的平板; 将平板对准电子部件，将包含焊料粉末的树脂组合物供给到平板和电子部件之间的间隙; 对树脂组合物进行退火，通过使熔融的焊料粉末在端子上自组装，将包含在树脂组合物中的焊料粉末熔化成使焊料粉末生长直至平板表面的水平，从而形成焊料凸块 在终端上 并且在冷却并固化焊料凸块之后去除平板。 因此，形成具有对应于突起或具有与凹部对应的突起的凹坑的焊料凸块。

公开(公告)号：US20090230546A1

公开(公告)日：2009-09-17

申请号：US11908087

申请日：2006-02-28

Applicant: Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

Inventor： Shingo Komatsu ,  Seiichi Nakatani ,  Seiji Karashima ,  Toshiyuki Kojima ,  Takashi Kitae ,  Yoshihisa Yamashita

IPC: H01L23/498 ,  B23K31/02

CPC classification number: H01L24/81 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83886 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06582 ,  H01L2225/06593 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A mounted body of the present invention includes: a multilayer semiconductor chip 20 including a plurality of semiconductor chips 10 (10a, 10b) that are stacked; and a mounting board 13 on which the multilayer semiconductor chip 20 is mounted. In this mounted body, each of the semiconductor chips 10 (10a, 10b) in the multilayer semiconductor chip 20 has a plurality of element electrodes 12 (12a, 12b) on a chip surface 21 (21a, 21b) facing toward the mounting board 13. On the mounting board 13, electrode terminals 14 are formed so as to correspond to the plurality of element electrodes (12a, 12b), respectively, and the electrode terminals 14 of the mounting board and the element electrodes (12a, 12b) are connected electrically to each other via solder bump formed as a result of assembly of solder particles. With this configuration, a mounted body on which a stacked package is mounted can be manufactured easily.

Abstract translation: 本发明的安装体包括：层叠半导体芯片10（10a，10b）的多层半导体芯片20， 以及安装基板13，其上安装有多层半导体芯片20。 在该安装体中，多层半导体芯片20中的各半导体芯片10（10a，10b）在与安装基板13相对的芯片面21（21a，21b）上具有多个元件电极12（12a，12b） 在安装基板13上分别形成有与多个元件电极（12a，12b）对应的电极端子14，并且安装基板的电极端子14和元件电极（12a，12b）被连接 通过焊料颗粒的组装形成的焊锡凸块彼此电连接。 利用这种结构，可以容易地制造安装有堆叠的包装的安装体。