公开(公告)号：US08637399B2

公开(公告)日：2014-01-28

申请号：US13600392

申请日：2012-08-31

Applicant: Hong-Sick Park ,  Bong-Kyun Kim ,  Wang-Woo Lee ,  Ki-Beom Lee ,  Sam-Young Cho ,  Won-Guk Seo ,  Gyu-Po Kim

Inventor： Hong-Sick Park ,  Bong-Kyun Kim ,  Wang-Woo Lee ,  Ki-Beom Lee ,  Sam-Young Cho ,  Won-Guk Seo ,  Gyu-Po Kim

IPC: H01L21/311

CPC classification number: C09K13/06 ,  C23F1/18 ,  C23F1/34 ,  H01L21/32134

Abstract: An etching composition for a copper-containing layer includes about 0.1% to about 30% by weight of ammonium persulfate, about 0.1% to about 10% by weight of a sulfate, about 0.01% to about 5% by weight of an acetate and about 55% to about 99.79% by weight of water. The etching composition having improved stability during storage and an increased capacity for etching.

Abstract translation: 含铜层的蚀刻组合物包含约0.1％至约30％重量的过硫酸铵，约0.1％至约10％重量的硫酸盐，约0.01％至约5％重量的乙酸盐和约 55％至约99.79％的水。 蚀刻组合物在储存期间具有改进的稳定性和增加的蚀刻能力。

公开(公告)号：US20130178010A1

公开(公告)日：2013-07-11

申请号：US13585255

申请日：2012-08-14

Applicant: Bong-Kyun KIM ,  Wang-Woo Lee ,  Shin Il Choi ,  Hong-Sick Park ,  Young-Woo Park

Inventor： Bong-Kyun KIM ,  Wang-Woo Lee ,  Shin Il Choi ,  Hong-Sick Park ,  Young-Woo Park

IPC: C23F1/14 ,  B05D3/00 ,  H01L33/08

CPC classification number: H01L27/1288 ,  C23F1/18 ,  C23F1/26 ,  H01L21/02071 ,  H01L21/32134 ,  H01L27/124

Abstract: A method of forming a metal pattern is provided. In the method, a first titanium layer, a copper layer and a second titanium layer are sequentially formed on a substrate. A photo pattern is formed on the second titanium layer. The first titanium layer, the copper layer and the second titanium layer are patterned using the photo pattern to form a first titanium pattern, a copper pattern formed on the first titanium pattern and a second titanium pattern formed on the copper pattern. Therefore, a fine metal pattern may be formed.

Abstract translation: 提供了形成金属图案的方法。 在该方法中，在基板上依次形成第一钛层，铜层和第二钛层。 在第二钛层上形成照片图案。 使用照片图案对第一钛层，铜层和第二钛层进行图案化，以形成第一钛图案，形成在第一钛图案上的铜图案和形成在铜图案上的第二钛图案。 因此，可以形成精细的金属图案。

公开(公告)号：US20130115770A1

公开(公告)日：2013-05-09

申请号：US13600392

申请日：2012-08-31

Applicant: Hong-Sick Park ,  Bong-Kyun Kim ,  Wang-Woo Lee ,  Ki-Beom Lee ,  Sam-Young Cho ,  Won-Guk Seo ,  Gyu-Po Kim

Inventor： Hong-Sick Park ,  Bong-Kyun Kim ,  Wang-Woo Lee ,  Ki-Beom Lee ,  Sam-Young Cho ,  Won-Guk Seo ,  Gyu-Po Kim

IPC: C09K13/00 ,  H01L21/302

CPC classification number: C09K13/06 ,  C23F1/18 ,  C23F1/34 ,  H01L21/32134

Abstract: An etching composition for a copper-containing layer includes about 0.1% to about 30% by weight of ammonium persulfate, about 0.1% to about 10% by weight of a sulfate, about 0.01% to about 5% by weight of an acetate and about 55% to about 99.79% by weight of water. The etching composition having improved stability during storage and an increased capacity for etching

Abstract translation: 含铜层的蚀刻组合物包含约0.1％至约30％重量的过硫酸铵，约0.1％至约10％重量的硫酸盐，约0.01％至约5％重量的乙酸盐和约 55％至约99.79％的水。 蚀刻组合物在储存期间具有改进的稳定性和增加的蚀刻能力

公开(公告)号：US08927436B2

公开(公告)日：2015-01-06

申请号：US13480242

申请日：2012-05-24

Applicant: Dae Ho Kim ,  Bong-Kyun Kim ,  Yong-Hwan Ryu ,  Hong Sick Park ,  Wang Woo Lee ,  Shin Il Choi

Inventor： Dae Ho Kim ,  Bong-Kyun Kim ,  Yong-Hwan Ryu ,  Hong Sick Park ,  Wang Woo Lee ,  Shin Il Choi

IPC: H01L21/302

CPC classification number: H01L21/31116 ,  H01L21/02063 ,  H01L21/31144 ,  H01L27/124 ,  H01L27/1248 ,  H01L29/42384

Abstract: The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon.

Abstract translation: 本发明涉及使用金属掩模形成沟槽中的残留颗粒的形成方法，金属线形成方法以及薄膜晶体管阵列板的制造方法。 形成沟槽的方法包括：在衬底上形成第一绝缘层; 在所述第一绝缘层上形成第一金属层; 通过图案化第一金属层形成开口; 通过使用图案化的第一金属层作为掩模对第一绝缘层进行干蚀刻来形成沟槽; 并湿法蚀刻基板。 使用主蚀刻气体和第一辅助蚀刻气体进行干蚀刻，并且第一辅助蚀刻气体包括氩。

公开(公告)号：US20130115733A1

公开(公告)日：2013-05-09

申请号：US13547783

申请日：2012-07-12

Applicant: Bong-Kyun KIM ,  Hong Sick PARK ,  Wang Woo LEE ,  Young Woo PARK ,  Shin Il CHOI ,  Sang-Woo KIM ,  Ki-Beom LEE ,  Dae-Woo LEE ,  Sam-Young CHO ,  Jeong-Heon CHOI

Inventor： Bong-Kyun KIM ,  Hong Sick PARK ,  Wang Woo LEE ,  Young Woo PARK ,  Shin Il CHOI ,  Sang-Woo KIM ,  Ki-Beom LEE ,  Dae-Woo LEE ,  Sam-Young CHO ,  Jeong-Heon CHOI

IPC: H01L21/465 ,  C09K13/06 ,  C09K13/00

CPC classification number: H01L21/32134 ,  C09K13/06 ,  C09K13/08 ,  C09K13/10 ,  H01L21/465 ,  H01L29/7869

Abstract: Provided is an etchant composition. The etchant composition according to an exemplary embodiment of the present invention includes ammonium persulfate ((NH4)2)S2O8, an azole-based compound, a water-soluble amine compound, a sulfonic acid-containing compound, a nitrate-containing compound, and water.

Abstract translation: 提供了一种蚀刻剂组合物。 根据本发明的示例性实施方案的蚀刻剂组合物包括过硫酸铵（（NH 4）2）S2O8，唑类化合物，水溶性胺化合物，含磺酸化合物，含硝酸盐化合物和 水。

公开(公告)号：US08377325B2

公开(公告)日：2013-02-19

申请号：US13032563

申请日：2011-02-22

Applicant: Nam-Seok Suh ,  Sun-Young Hong ,  Jong-Hyun Choung ,  Bong-Kyun Kim ,  Hong-Sick Park ,  Jean-Ho Song ,  Wang-Woo Lee ,  Do-Won Kim ,  Sang-Woo Kim ,  Won-Guk Seo ,  Hyun-Cheol Shin ,  Ki-Beom Lee ,  Sam-Young Cho

Inventor： Nam-Seok Suh ,  Sun-Young Hong ,  Jong-Hyun Choung ,  Bong-Kyun Kim ,  Hong-Sick Park ,  Jean-Ho Song ,  Wang-Woo Lee ,  Do-Won Kim ,  Sang-Woo Kim ,  Won-Guk Seo ,  Hyun-Cheol Shin ,  Ki-Beom Lee ,  Sam-Young Cho

IPC: B44C1/22 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  C25F3/00

CPC classification number: C09K13/08 ,  C23F1/18 ,  C23F1/26 ,  C23F1/44 ,  H01L21/28088 ,  H01L21/32134 ,  H01L27/1214 ,  H01L27/124 ,  H05K3/067

Abstract: Exemplary embodiments of the present invention provide a metal wiring etchant. A metal wiring etchant according to an exemplary embodiment of the present invention includes ammonium persulfate, an organic acid, an ammonium salt, a fluorine-containing compound, a glycol-based compound, and an azole-based compound.

Abstract translation: 本发明的示例性实施方案提供金属线路蚀刻剂。 根据本发明的示例性实施方式的金属线蚀刻剂包括过硫酸铵，有机酸，铵盐，含氟化合物，二醇类化合物和唑类化合物。

公开(公告)号：US08357554B2

公开(公告)日：2013-01-22

申请号：US13156986

申请日：2011-06-09

Applicant: Wang-Woo Lee ,  Hong-Sick Park

Inventor： Wang-Woo Lee ,  Hong-Sick Park

IPC: H01L21/00

CPC classification number: H01L33/0041 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1292

Abstract: A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.

Abstract translation: 提供具有低电阻信号线的显示基板和制造显示基板的方法。 显示基板包括绝缘基板，栅极线，数据线和像素电极。 栅极线栅极线通过子沟槽和开口部分形成。 子沟槽形成在绝缘衬底中，并且开口部分通过绝缘衬底上的与子沟槽位置对应的位置处的平坦化层形成。 数据线穿过栅极线。 像素电极通过开关元件电连接到栅极线和数据线。 因此，通过使用平坦化层和绝缘基板形成的沟槽形成信号线，使得信号线的电阻可能降低。

公开(公告)号：US20130015471A1

公开(公告)日：2013-01-17

申请号：US13438405

申请日：2012-04-03

Applicant: Hong-Sick PARK ,  Wang-Woo Lee

Inventor： Hong-Sick PARK ,  Wang-Woo Lee

IPC: H01L27/15 ,  C09K13/08 ,  H01L33/08 ,  C09K13/06

CPC classification number: C09K13/08 ,  C23F1/02 ,  C23F1/18 ,  H01L21/32134 ,  H01L27/124

Abstract: An etchant includes about 50% by weight to about 70% by weight of phosphoric acid, about 1% by weight to about 5% by weight of nitric acid, about 10% by weight to about 20% by weight of acetic acid, about 0.1% by weight to about 2% by weight of a corrosion inhibition agent including an azole-based compound and a remainder of water.

Abstract translation: 蚀刻剂包括约50重量％至约70重量％的磷酸，约1重量％至约5重量％的硝酸，约10重量％至约20重量％的乙酸，约0.1 约2重量％的包含唑类化合物和其余水的腐蚀抑制剂。

公开(公告)号：US20120135555A1

公开(公告)日：2012-05-31

申请号：US13157806

申请日：2011-06-10

Applicant: Jong-Hyun CHOUNG ,  Yang Ho BAE ,  Jean Ho SONG ,  O. Sung SEO ,  Sun-Young HONG ,  Hwa Yeul OH ,  Bong-Kyun KIM ,  Nam Seok SUH ,  Dong-Ju YANG ,  Wang Woo LEE

Inventor： Jong-Hyun CHOUNG ,  Yang Ho BAE ,  Jean Ho SONG ,  O. Sung SEO ,  Sun-Young HONG ,  Hwa Yeul OH ,  Bong-Kyun KIM ,  Nam Seok SUH ,  Dong-Ju YANG ,  Wang Woo LEE

IPC: H01L33/62

CPC classification number: H01L21/32134 ,  G02F1/136227 ,  H01L27/1288 ,  H01L29/41733

Abstract: A method for manufacturing a thin film transistor array panel, including: sequentially forming a first silicon layer, a second silicon layer, a lower metal layer, and an upper metal layer on a gate insulating layer and a gate line; forming a first film pattern on the upper metal layer; forming a first lower metal pattern and a first upper metal pattern that includes a protrusion, by etching the upper metal layer and the lower metal layer; forming first and second silicon patterns by etching the first and second silicon layers; forming a second film pattern by ashing the first film pattern; forming a second upper metal pattern by etching the first upper metal pattern; forming a data line and a thin film transistor by etching the first lower metal pattern and the first and second silicon patterns; and forming a passivation layer and a pixel electrode on the resultant.

Abstract translation: 一种制造薄膜晶体管阵列面板的方法，包括：在栅绝缘层和栅极线上依次形成第一硅层，第二硅层，下金属层和上金属层; 在上金属层上形成第一膜图案; 通过蚀刻上金属层和下金属层，形成第一下金属图案和包括突起的第一上金属图案; 通过蚀刻第一和第二硅层形成第一和第二硅图案; 通过灰化第一膜图案形成第二膜图案; 通过蚀刻第一上金属图案形成第二上金属图案; 通过蚀刻第一下金属图案和第一和第二硅图案来形成数据线和薄膜晶体管; 并在所得物上形成钝化层和像素电极。

公开(公告)号：US20120132917A1

公开(公告)日：2012-05-31

申请号：US13156986

申请日：2011-06-09

Applicant: Wang-Woo LEE ,  Hong-Sick Park

Inventor： Wang-Woo LEE ,  Hong-Sick Park

IPC: H01L29/786 ,  H01L33/08

CPC classification number: H01L33/0041 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1292

Abstract: A display substrate having a low resistance signal line and a method of manufacturing the display substrate are provided. The display substrate includes an insulation substrate, a gate line, a data line and a pixel electrode. The gate line gate line is formed through a sub-trench and an opening portion. The sub-trench is formed in the insulation substrate and the opening portion is formed through a planarization layer on the insulation substrate at a position corresponding to the position of the sub-trench. The data line crosses the gate line. The pixel electrode is electrically connected to the gate line and the data line through a switching element. Thus, a signal line is formed through a trench formed by using a planarization layer and an insulation substrate, so that a resistance of the signal line may be reduced.

Abstract translation: 提供具有低电阻信号线的显示基板和制造显示基板的方法。 显示基板包括绝缘基板，栅极线，数据线和像素电极。 栅极线栅极线通过子沟槽和开口部分形成。 子沟槽形成在绝缘衬底中，并且开口部分通过绝缘衬底上的与子沟槽位置对应的位置处的平坦化层形成。 数据线穿过栅极线。 像素电极通过开关元件电连接到栅极线和数据线。 因此，通过使用平坦化层和绝缘基板形成的沟槽形成信号线，使得信号线的电阻可能降低。