公开(公告)号：US08789620B2

公开(公告)日：2014-07-29

申请号：US11996996

申请日：2006-07-28

Applicant: Erwan Lemenager ,  Martin Luling ,  Yves Mathieu ,  Christian Chouzenoux

Inventor： Erwan Lemenager ,  Martin Luling ,  Yves Mathieu ,  Christian Chouzenoux

IPC: E21B47/00

CPC classification number: E21B47/12 ,  E21B47/122 ,  G01V3/083 ,  G01V11/002 ,  G01V11/005

Abstract: The invention provides a method of receiving and/or transmitting information in a well drilled in a geological formation between a first location and a second location, the well comprising a casing communicating with the geological formation. The method comprises placing a first transducer at a first location, placing a second transducer at a second location. Transmitting an electric signal between the first and second transducers.

Abstract translation: 本发明提供一种在第一位置和第二位置之间的地质层中钻井中接收和/或传送信息的方法，所述井包括与地质层连通的壳体。 该方法包括将第一换能器放置在第一位置，将第二换能器放置在第二位置。 在第一和第二换能器之间传输电信号。

公开(公告)号：US20070198783A1

公开(公告)日：2007-08-23

申请号：US11568133

申请日：2005-04-21

Applicant: Christophe Cunat ,  Jean Gobert ,  Yves Mathieu

Inventor： Christophe Cunat ,  Jean Gobert ,  Yves Mathieu

IPC: G06F13/00

CPC classification number: G06F12/0207 ,  Y02D10/13

Abstract: The present invention relates to a memory management unit (MMU) for storing data values, said memory management unit comprising a memory unit (IM) which is adapted to store temporarily at least two sets of data values; and a controller (CTRL) which is configured such that it is able to store a first set of data values in a first area of the memory unit, and to store a second set of data values spatially adjacent to the first set of data values in a horizontal and/or in a vertical direction in such a way that a first part of the second set of data values is stored in a second area of the memory unit adjacent to the first area in a horizontal and/or in a vertical direction, respectively, and that the other part of the second set of data values to be stored which exceeds the memory unit size in a horizontal and/or in a vertical direction, respectively, is stored in at least one other area of the memory unit according to a torus principle.

Abstract translation: 本发明涉及一种用于存储数据值的存储器管理单元（MMU），所述存储器管理单元包括适于临时存储至少两组数据值的存储器单元（IM） 以及控制器（CTRL），其被配置为使得能够将第一组数据值存储在存储器单元的第一区域中，并且存储与第一组数据值空间上相邻的第二组数据值 水平和/或垂直方向，使得第二组数据值的第一部分以水平和/或垂直方向存储在与第一区相邻的存储单元的第二区域中， 并且分别存储在水平和/或垂直方向上超过存储器单元尺寸的要存储的第二组数据值的另一部分，根据存储单元的至少另一个区域存储 环面原理。

公开(公告)号：US20060270244A1

公开(公告)日：2006-11-30

申请号：US11207069

申请日：2005-08-17

Applicant: Nicolas Daval ,  Yves-Mathieu Le Vaillant

Inventor： Nicolas Daval ,  Yves-Mathieu Le Vaillant

IPC: H01L21/31

CPC classification number: H01L21/02126 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/31658

Abstract: The present invention provides a method of forming a structure produced from semiconductor materials with the structure having a substrate layer and an insulating layer, and the method including the steps of creating the insulating layer involving constituting an oxidizable layer on the substrate layer and oxidizing the oxidizable layer. The method includes the steps of providing a thin elemental insulating layer at a mean thickness of 20 nm or less upon a substrate layer; providing an oxidizable layer upon the insulating layer; thermally oxidizing the oxidizable layer so that the combination of the oxidized oxidizable layer and the thin elemental insulating layer provides a desired thickness of the insulating layer of the structure.

Abstract translation: 本发明提供一种形成由具有基底层和绝缘层的结构的半导体材料制成的结构的方法，该方法包括以下步骤：在基底层上形成包含构成可氧化层的绝缘层，并氧化可氧化的 层。 该方法包括以下步骤：在衬底层上提供平均厚度为20nm或更小的薄元素绝缘层; 在所述绝缘层上提供可氧化层; 热氧化可氧化层，使得氧化可氧化层和薄元素绝缘层的组合提供了该结构的绝缘层的期望厚度。

公开(公告)号：US4994997A

公开(公告)日：1991-02-19

申请号：US245887

申请日：1988-09-16

Applicant: Philippe Martin ,  Thierry Bonnet ,  Yves Mathieu

Inventor： Philippe Martin ,  Thierry Bonnet ,  Yves Mathieu

IPC: G06F7/527 ,  G06F7/508 ,  G06F7/52 ,  G06F7/525 ,  G06F7/544

CPC classification number: G06F7/5443 ,  G06F7/525 ,  G06F7/5324 ,  G06F2207/3884

Abstract: A pipeline-type serial multiplier having a cellular structure, each cell comprising an adder which operates on 3 one-bit data x, y, c and which determines the result v modulo 2 and the carry c.sub.o of the addition of x, y, and c. Each adder simultaneously determines a data c.sub.1 which is the modulo 2 result of the addition of x, y, c.sub.o. This enables the exact final result of a multiplication of a data A of n bits by a data B of p bits to be obtained in two successive segments: a segment L which is formed by the p bits of lowest digital weight and a segment H which is formed by the n bits of the highest weight. The output rate is F/n, where F is the clock frequency. The multiplier circuits can be cascaded under the control of an external signal. They can also be connected in parallel in order to add the results of two multiplications.

Abstract translation: 具有蜂窝结构的流水线型串行乘法器，每个单元包括对3位1位数据x，y，c进行操作的加法器，并且其确定结果v为模2，并且x，y和x的加法的进位co C。 每个加法器同时确定作为x，y，co的相加的模2结果的数据c1。 这使得能够在两个连续的段中获得n位的数据A乘以p位的数据B的精确最终结果：由最低数字权重的p位形成的段L和段H 由最高重量的n位形成。 输出速率为F / n，其中F为时钟频率。 乘法器电路可以在外部信号的控制下级联。 它们也可以并联连接，以增加两次乘法的结果。

公开(公告)号：US4977518A

公开(公告)日：1990-12-11

申请号：US318085

申请日：1989-03-02

Applicant: Thierry Bonnet ,  Yves Mathieu

Inventor： Thierry Bonnet ,  Yves Mathieu

IPC: G09G5/00 ,  G06F3/033 ,  G06F3/048 ,  G06F3/14 ,  G06T1/00 ,  G09G5/08 ,  G09G5/36

CPC classification number: G06F3/04842 ,  G06T1/0007

Abstract: Video graphics system which, by means of a graphics cursor, permits the identification of encoded surfaces of images represented on a screen. In order to do this, there are added to the parameters of the encoded surface, for each surface, an identifier which can be read by slices in the course of readings effected on a plurality of successive frames. An identification memory permits the accumulation of all the slices until the complete acquisition of the identifier. This situation is brought to the attention of the user.

Abstract translation: 通过图形光标允许识别在屏幕上表示的图像的编码表面的视频图形系统。 为了做到这一点，对于每个表面，编码表面的参数被添加到可以在多个连续帧上实现的读取过程中由切片读取的标识符。 识别存储器允许所有片段的累积，直到完全获取标识符。 这种情况引起用户的注意。

公开(公告)号：US3226963A

公开(公告)日：1966-01-04

申请号：US26461363

申请日：1963-03-12

Applicant: YVES MATHIEU

Inventor： YVES MATHIEU

IPC: E05B37/16

CPC classification number: E05B37/16 ,  Y10T70/7226 ,  Y10T70/7316

公开(公告)号：US20080248631A1

公开(公告)日：2008-10-09

申请号：US12139609

申请日：2008-06-16

Applicant: Fabrice Letertre ,  Yves Mathieu Le Vaillant ,  Eric Jalaguier

Inventor： Fabrice Letertre ,  Yves Mathieu Le Vaillant ,  Eric Jalaguier

IPC: H01L21/30

CPC classification number: H01L21/76254 ,  H01L21/2258

Abstract: A method of producing a substrate that has a transfer crystalline layer transferred from a donor wafer onto a support. The transfer layer can include one or more foreign species to modify its properties. In the preferred embodiment an atomic species is implanted into a zone of the donor wafer that is substantially free of foreign species to form an embrittlement or weakened zone below a bonding face thereof, with the weakened zone and the bonding face delimiting a transfer layer to be transferred. The donor wafer is preferably then bonded at the level of its bonding face to a support. Stresses are then preferably applied to produce a cleavage in the region of the weakened zone to obtain a substrate that includes the support and the transfer layer. Foreign species are preferably diffused into the thickness of the transfer layer prior to implantation or after cleavage to modify the properties of the transfer layer, preferably its electrical or optical properties. The preferred embodiment produces substrates with a thin InP layer rendered semi-insulating by iron diffusion.

Abstract translation: 一种制备具有从施主晶片转移到载体上的转移晶体层的衬底的方法。 转移层可以包括一种或多种外来物质来改变其性质。 在优选的实施方案中，将原子物质注入到施主晶片的基本上不含外来物质的区域中，以在其接合面下面形成脆化或弱化区域，其中弱化区域和键合面限定转移层为 转入。 然后优选地，施主晶片在其结合面的水平面处结合到支撑体上。 然后优选施加应力以在弱化区域的区域中产生切割，以获得包括载体和转移层的基底。 外来物质优选在植入之前或切割后扩散到转移层的厚度中，以改变转移层的性质，优选其电学或光学性质。 优选实施例产生具有通过铁扩散而半绝缘的薄InP层的衬底。

公开(公告)号：US20070007001A1

公开(公告)日：2007-01-11

申请号：US10554362

申请日：2004-04-09

Applicant: Stephane Hiron ,  Yves Mathieu ,  Christian Chouzenoux ,  Patrick Gourdonneau ,  Nicolas Renoux

Inventor： Stephane Hiron ,  Yves Mathieu ,  Christian Chouzenoux ,  Patrick Gourdonneau ,  Nicolas Renoux

IPC: E21B29/02

CPC classification number: E21B47/12 ,  H04B2203/5475

Abstract: A well instrumentation system, comprising: a power and data supply; and a plurality of functional units attached to the power and data supply and distributed throughout the well, characterised in that the power and data supply comprises first and second substantially identical cables, and in that each unit comprises a first power supply channel and a first data channel connected to the first cable, a second power supply channel and a second data channel connected to the second cable, and a functional module which draws power from the first power supply channel or the second power channel module, and data from the first data channel or the second data channel. The power and data supply can comprise a surface unit that can be selectably connected to either the first or second cable. The selection of connection of the surface unit to one or other cable is effective to select the corresponding power and data channels in the functional units.

Abstract translation: 一个井仪表系统，包括：电力和数据供应; 以及附接到电力和数据供应并分布在整个井中的多个功能单元，其特征在于，所述电源和数据供应包括第一和第二基本相同的电缆，并且每个单元包括第一电源通道和第一数据 连接到第一电缆的通道，连接到第二电缆的第二电源通道和第二数据通道，以及从第一电源通道或第二电源通道模块抽取电力的功能模块以及来自第一数据通道的数据 或第二数据信道。 电力和数据供应可以包括可以可选择地连接到第一或第二电缆的表面单元。 表面单元与一根或另一根电缆连接的选择有效地在功能单元中选择相应的功率和数据通道。

公开(公告)号：US07033905B2

公开(公告)日：2006-04-25

申请号：US10726039

申请日：2003-12-01

Applicant: Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Yves-Mathieu Vaillant ,  Takeshi Akatsu

Inventor： Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Yves-Mathieu Vaillant ,  Takeshi Akatsu

IPC: H01L21/76

CPC classification number: H01L21/02032 ,  C30B33/00 ,  H01L21/76251 ,  H01L21/76254 ,  H01L21/76256 ,  H01L21/76259

Abstract: A method of recycling a donor wafer after detaching at least one useful layer is provided, the donor wafer comprising successively a substrate, a buffer structure and, before detachment, a useful layer. The method comprises employing mechanical means to remove part of the donor wafer on the side where the detachment took place, such that, after removal of substance, there remains at least part of the buffer structure capable of being reused as at least part of a buffer structure during a subsequent detachment of a useful layer. The present document also relates to methods of detaching a thin layer from a donor wafer which can be recycled according to the invention, as well as donor wafers which can be recycled in accordance with the invention.

Abstract translation: 提供了在分离至少一个有用层之后回收施主晶片的方法，施主晶片依次包括基板，缓冲结构，并且在分离之前，包括有用层。 该方法包括采用机械装置来去除在脱离发生的一侧的施主晶片的一部分，使得在去除物质之后，至少部分能够被重新用作缓冲结构的缓冲结构作为至少部分缓冲液 在有用层的随后拆卸期间的结构。 本文件还涉及从可以根据本发明再循环的供体晶片以及可根据本发明再循环的供体晶片分离薄层的方法。

公开(公告)号：US07008857B2

公开(公告)日：2006-03-07

申请号：US10764289

申请日：2004-01-23

Applicant: Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Yves-Mathieu Vaillant ,  Takeshi Akatsu

Inventor： Bruno Ghyselen ,  Cécile Aulnette ,  Bénédite Osternaud ,  Yves-Mathieu Vaillant ,  Takeshi Akatsu

IPC: H01L21/46

CPC classification number: H01L21/02032

Abstract: A method of recycling a donor wafer after detaching at least one useful layer is provided, the donor wafer comprising successively a substrate, a buffer structure and, before detachment, a useful layer. The method includes removal of substance relating to part of the donor wafer on the side where the detachment took place, such that, after removal of substance, there remains at least part of the buffer structure capable of being reused as at least part of a buffer structure during a subsequent detachment of a useful layer. The present document also relates to a method of producing a donor wafer which can be recycled according to the invention, methods of detaching a thin layer from a donor wafer which can be recycled according to the invention, and donor wafers which can be recycled according to the invention.

Abstract translation: 提供了在分离至少一个有用层之后回收施主晶片的方法，施主晶片依次包括基板，缓冲结构，并且在分离之前，包括有用层。 该方法包括去除与脱离一侧的施主晶片的一部分相关的物质，使得在去除物质之后，至少部分缓冲结构能够被重新用作缓冲液的至少一部分 在有用层的随后拆卸期间的结构。 本文件还涉及一种生产可根据本发明再循环的供体晶片的方法，从根据本发明可再循环的供体晶片上分离薄层的方法以及可根据本发明再循环的供体晶片 本发明。