公开(公告)号：US12057314B2

公开(公告)日：2024-08-06

申请号：US17317965

申请日：2021-05-12

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Peter Westrom ,  Joe Margetis ,  Xin Sun ,  Caleb Miskin ,  Yen Lin Leow ,  Yanfu Lu

IPC: C30B25/16 ,  C23C16/08 ,  C23C16/455 ,  C23C16/52 ,  C30B25/18 ,  C30B29/52 ,  H01L21/02

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/45512 ,  C23C16/52 ,  C30B25/165 ,  C30B25/186 ,  C30B29/52 ,  H01L21/02532

Abstract: A method of forming a silicon germanium layer on a surface of a substrate and a system for forming a silicon germanium layer are disclosed. Examples of the disclosure provide a method that includes providing a plurality of growth precursors to control and/or promote parasitic gas-phase and surface reactions, such that greater control of the film (e.g., thickness and/or composition) uniformity can be realized.

公开(公告)号：US11557474B2

公开(公告)日：2023-01-17

申请号：US16932275

申请日：2020-07-17

Applicant: ASM IP Holding B.V.

Inventor： John Tolle ,  Joe Margetis ,  David Kohen

IPC: C23C16/30 ,  H01L21/02 ,  H01L29/08 ,  H01L29/66 ,  C23C16/458 ,  C23C16/02 ,  C23C16/52 ,  C23C16/22 ,  C23C16/44 ,  C23C16/46 ,  C23C16/455

Abstract: A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.

公开(公告)号：US20210375622A1

公开(公告)日：2021-12-02

申请号：US17326912

申请日：2021-05-21

Applicant: ASM IP Holding B.V.

Inventor： Lucas Petersen Barbosa Lima ,  Joe Margetis ,  John Tolle ,  Rami Khazaka ,  Qi Xie

IPC: H01L21/02 ,  C30B25/04 ,  C30B29/52 ,  C30B25/18

Abstract: Methods and devices for epitaxially growing boron- and gallium-doped silicon germanium layers. The layers may be used, for example, as a p-type source and/or drain regions in field effect transistors.

公开(公告)号：US20210327704A1

公开(公告)日：2021-10-21

申请号：US17141360

申请日：2021-01-05

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Joe Margetis ,  Xin Sun ,  David Kohen ,  Dieter Pierreux

IPC: H01L21/02 ,  C23C16/24 ,  C23C16/08 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  C23C16/52

Abstract: Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.

公开(公告)号：US20190013199A1

公开(公告)日：2019-01-10

申请号：US15985261

申请日：2018-05-21

Applicant: ASM IP Holding B.V.

Inventor： Nupur Bhargava ,  Joe Margetis ,  John Tolle

IPC: H01L21/02 ,  C23C16/40

Abstract: A method for forming a forming a silicon germanium tin (SiGeSn) layer is disclosed. The method may include, providing a substrate within a reaction chamber, exposing the substrate to a pre-deposition precursor pulse, which comprises tin tetrachloride (SnCl4), exposing the substrate to a deposition precursor gas mixture comprising a hydrogenated silicon source, germane (GeH4), and tin tetrachloride (SnCl4), and depositing the silicon germanium tin (SiGeSn) layer over a surface of the substrate. Semiconductor device structures including a silicon germanium tin (SiGeSn) layer formed by the methods of the disclosure are also provided.

公开(公告)号：US09905420B2

公开(公告)日：2018-02-27

申请号：US14956115

申请日：2015-12-01

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L21/20 ,  H01L21/36 ,  H01L21/02 ,  H01L29/161 ,  H01L29/165

CPC classification number: H01L21/02535 ,  H01L21/0245 ,  H01L21/02452 ,  H01L21/02505 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/161 ,  H01L29/165

Abstract: Methods of forming silicon germanium tin (SixGe1-xSny) films are disclosed. Exemplary methods include growing films including silicon, germanium and tin in an epitaxial chemical vapor deposition reactor. Exemplary methods are suitable for high volume manufacturing. Also disclosed are structures and devices including silicon germanium tin films.

公开(公告)号：US11996289B2

公开(公告)日：2024-05-28

申请号：US17141360

申请日：2021-01-05

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Joe Margetis ,  Xin Sun ,  David Kohen ,  Dieter Pierreux

IPC: C23C16/24 ,  C23C16/08 ,  C23C16/42 ,  C23C16/455 ,  C23C16/52 ,  C30B25/16 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L21/0262 ,  C23C16/08 ,  C23C16/24 ,  C23C16/42 ,  C23C16/45523 ,  C23C16/52 ,  C30B25/165 ,  C30B25/18 ,  C30B29/06 ,  C30B29/52 ,  H01L21/02507 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02603 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696

Abstract: Methods and systems for forming structures including one or more layers comprising silicon germanium and one or more layers comprising silicon are disclosed. Exemplary methods can include using a surfactant, using particular precursors, and/or using a transition step to improve an interface between adjacent layers comprising silicon germanium and comprising silicon.

公开(公告)号：US20220310825A1

公开(公告)日：2022-09-29

申请号：US17839725

申请日：2022-06-14

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L29/66 ,  H01L21/285 ,  H01L29/78 ,  H01L29/167 ,  H01L29/08 ,  H01L23/535 ,  H01L21/02

Abstract: A method for depositing a Group IV semiconductor is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The methods may further include, exposing the substrate to at least one Group IV precursor and exposing the substrate to at least one Group IIIA metalorganic dopant precursor. The methods may further include depositing a Group IV semiconductor on a surface of the substrate. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US11018002B2

公开(公告)日：2021-05-25

申请号：US16000156

申请日：2018-06-05

Applicant: ASM IP Holding B.V.

Inventor： Joe Margetis ,  John Tolle

IPC: H01L21/336 ,  H01L21/02 ,  H01L29/66 ,  H01L21/285 ,  H01L29/78 ,  H01L29/165 ,  H01L29/167 ,  H01L29/08 ,  H01L29/45 ,  H01L23/535 ,  H01L21/8238

Abstract: A method for selectively depositing a Group IV semiconductor on a surface of a substrate is disclosed. The method may include, providing a substrate within a reaction chamber and heating the substrate to a deposition temperature. The method may further include, exposing the substrate to at least one Group IV precursor, and exposing the substrate to at least one Group IIIA halide dopant precursor. Semiconductor device structures including a Group IV semiconductor deposited by the methods of the disclosure are also provided.

公开(公告)号：US20200002811A1

公开(公告)日：2020-01-02

申请号：US16024390

申请日：2018-06-29

Applicant: ASM IP Holding B.V.

Inventor： Sonti Sreeram ,  John Tolle ,  Joe Margetis ,  Junwei Su

IPC: C23C16/455

Abstract: A flange, flange assembly, and reactor system including the flange and flange assembly are disclosed. An exemplary flange assembly includes heated and cooled sections to independently control temperatures of sections of the flange. Methods of using the flange, flange assembly and reactor system are also disclosed.