公开(公告)号：US07037851B2

公开(公告)日：2006-05-02

申请号：US10957513

申请日：2004-09-30

Applicant: Jean Paul Gueneau de Mussy ,  Gerald Beyer ,  Karen Maex

Inventor： Jean Paul Gueneau de Mussy ,  Gerald Beyer ,  Karen Maex

IPC: H01L21/302

CPC classification number: H01L21/76831 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53276 ,  H01L23/5328 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Method for the production of airgaps in a semiconductor device, the semiconductor device comprising a stack of layers, the stack of layers comprising at least one iteration of a sub-stack of layers.

Abstract translation: 用于在半导体器件中制造气隙的方法，所述半导体器件包括一叠层，所述层叠层包括至少一层叠层的迭代。

公开(公告)号：US20050074960A1

公开(公告)日：2005-04-07

申请号：US10957513

申请日：2004-09-30

Applicant: Jean Gueneau de Mussy ,  Gerald Beyer ,  Karen Maex

Inventor： Jean Gueneau de Mussy ,  Gerald Beyer ,  Karen Maex

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/4763 ,  H01L21/31 ,  H01L21/469

CPC classification number: H01L21/76831 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/53276 ,  H01L23/5328 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: Method for the production of airgaps in a semiconductor device, the semiconductor device comprising a stack of layers, the stack of layers comprising at least one iteration of a sub-stack of layers.

Abstract translation: 用于在半导体器件中制造气隙的方法，所述半导体器件包括一叠层，所述层叠层包括至少一层叠层的迭代。

公开(公告)号：US07745935B2

公开(公告)日：2010-06-29

申请号：US12252764

申请日：2008-10-16

Applicant: Gerald Beyer ,  Sywert H. Brongersma

Inventor： Gerald Beyer ,  Sywert H. Brongersma

IPC: H01L21/70

CPC classification number: H01L21/76877 ,  H01L21/2855 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76867 ,  H01L21/76883 ,  H01L23/53228 ,  H01L23/53238

Abstract: The present invention relates to a method for obtaining enlarged Cu grains in small trenches. More specifically it related to a method for creating enlarged copper grains or inducing super secondary grain growth in electrochemically deposited copper in narrow trenches and/or vias to be used in semiconductor devices.

Abstract translation: 本发明涉及在小沟槽中获得扩大的Cu晶粒的方法。 更具体地说，它涉及一种用于在用于半导体器件的窄沟槽和/或通孔中的电化学沉积铜中产生扩大的铜晶粒或诱导超级二次晶粒生长的方法。

公开(公告)号：US20090102051A1

公开(公告)日：2009-04-23

申请号：US12252764

申请日：2008-10-16

Applicant: Gerald Beyer ,  Sywert H. Brongersrma

Inventor： Gerald Beyer ,  Sywert H. Brongersrma

IPC: H01L23/48

CPC classification number: H01L21/76877 ,  H01L21/2855 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76867 ,  H01L21/76883 ,  H01L23/53228 ,  H01L23/53238

Abstract: The present invention relates to a method for obtaining enlarged Cu grains in small trenches. More specifically it related to a method for creating enlarged copper grains or inducing super secondary grain growth in electrochemically deposited copper in narrow trenches and/or vias to be used in semiconductor devices.

Abstract translation: 本发明涉及在小沟槽中获得扩大的Cu晶粒的方法。 更具体地说，它涉及一种用于在用于半导体器件的窄沟槽和/或通孔中的电化学沉积铜中产生扩大的铜晶粒或诱导超级二次晶粒生长的方法。

公开(公告)号：US20060274405A1

公开(公告)日：2006-12-07

申请号：US11446052

申请日：2006-06-02

Applicant: Carlo Waldfried ,  Orlando Escorcia ,  Gerald Beyer ,  Francesca Iacopi

Inventor： Carlo Waldfried ,  Orlando Escorcia ,  Gerald Beyer ,  Francesca Iacopi

IPC: F21V9/04

CPC classification number: H01L21/3122 ,  B05D3/067 ,  C08J3/28 ,  C09D183/04 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02137 ,  H01L21/02145 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/3121 ,  H01L21/31633 ,  H01L21/31695 ,  H01L21/76825

Abstract: Processes for forming a low k dielectric material onto a surface of a substrate comprises depositing the low k dielectric material onto the surface; and exposing the low k dielectric material to ultraviolet radiation for a period of time and intensity effective to increase a mechanical property of the low k dielectric material, wherein the mechanical property is significantly improved compared to a corresponding mechanical property of the low k dielectric material free from exposure to the ultraviolet radiation, or the corresponding mechanical property of the low k dielectric material that is furnace cured, or the corresponding mechanical property of the low k dielectric material that is exposed to excessive activating energy prior to ultraviolet radiation exposure, wherein excessive activating energy comprises an excessive hotplate bake sequence, a furnace cure, an annealing cure, a multi-temperature cure process or plasma treatment prior to the ultraviolet radiation.

Abstract translation: 在基板的表面上形成低k电介质材料的工艺包括将低k电介质材料沉积到表面上; 并且将低k电介质材料暴露于紫外线辐射一段时间和强度以有效地增加低k介电材料的机械性能，其中与低k电介质材料的相应机械性能相比，机械性能显着提高 或暴露于紫外线辐射下的低k电介质材料的相应机械性能，或在紫外线曝光之前暴露于过度活化能的低k电介质材料的相应机械性能，其中过度激活 能量包括过量的热板烘烤顺序，炉固化，退火固化，多温固化过程或在紫外线辐射之前的等离子体处理。

公开(公告)号：US20050074961A1

公开(公告)日：2005-04-07

申请号：US10957514

申请日：2004-09-30

Applicant: Gerald Beyer ,  Jean Gueneau de Mussy ,  Karen Maex ,  Victor Sutcliffe

Inventor： Gerald Beyer ,  Jean Gueneau de Mussy ,  Karen Maex ,  Victor Sutcliffe

IPC: H01L21/3065 ,  H01L21/311 ,  H01L21/316 ,  H01L21/768 ,  H01L23/522 ,  H01L21/4763 ,  H01L21/31 ,  H01L21/469 ,  H01L21/76

CPC classification number: H01L21/76802 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31633 ,  H01L21/764 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76835 ,  H01L21/76877 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for the production of airgaps in a semiconductor device and device produced therefrom. The formation of airgaps is accomplished, in part, by chemically and/or mechanically changing the properties of a first dielectric layer locally, such that at least part of said first dielectric layer is converted locally and becomes etchable by a first etching substance. The local conversion of the dielectric material may be achieved during anisotropic etching of the material in oxygen containing plasma or ex-situ by performing an oxidizing step (e.g., a UV/ozone treatment or supercritical carbon dioxide with addition of an oxidizer). Formation of airgaps is achieved after creation of conductive lines and, alternatively, a barrier layer by a first etching substance. The airgaps are formed in a dual damascene structure, near the vias and/or the trenches of the damascene structure.

Abstract translation: 一种用于生产半导体器件中的气隙的方法及其制造的装置。 气隙的形成部分地通过局部地化学和/或机械地改变第一介电层的性质来实现，使得至少部分所述第一电介质层被局部转化并且可被第一蚀刻物质蚀刻。 电介质材料的局部转化可以在含氧等离子体中的材料的各向异性蚀刻期间进行，或者通过进行氧化步骤（例如，加入氧化剂的UV /臭氧处理或超临界二氧化碳）来实现。 在创建导电线之后实现气隙的形成，或者通过第一蚀刻物质形成阻挡层。 空气隙形成在双镶嵌结构中，靠近镶嵌结构的通孔和/或沟槽。