公开(公告)号：US20050108460A1

公开(公告)日：2005-05-19

申请号：US10713486

申请日：2003-11-14

Applicant: Howard David

Inventor： Howard David

IPC: G06F12/00 ,  G11C11/406

CPC classification number: G11C11/406 ,  G11C11/40615 ,  G11C11/40618 ,  G11C11/40622

Abstract: A “partial refresh command” is used to refresh a fraction of the banks in a multi-bank DRAM. In a first implementation the command refreshes one half of the banks. In a second implementation the command refreshes one quarter of the banks. The power drawn by the upper or lower bank refresh on the eight bank DRAM is the same as the power drawn by an “all bank” refresh on a four bank DRAM, without requiring the refresh period to be extended.

Abstract translation: “部分刷新命令”用于刷新多行DRAM中的一部分存储体。 在第一个实施中，命令刷新了一半的银行。 在第二个实施中，命令刷新了四分之一的银行。 在八个存储体DRAM上刷新的上部或下部组的功率与在四个存储体DRAM上的“全部存储体”刷新所绘制的功率相同，而不需要延长刷新周期。

公开(公告)号：US08046559B2

公开(公告)日：2011-10-25

申请号：US12057132

申请日：2008-03-27

Applicant: Hongzhong Zheng ,  Ulf R. Hanebutte ,  Eugene Gorbatov ,  Howard David

Inventor： Hongzhong Zheng ,  Ulf R. Hanebutte ,  Eugene Gorbatov ,  Howard David

IPC: G06F12/00

CPC classification number: G06F9/5016 ,  G06F13/28 ,  Y02D10/14 ,  Y02D10/22

Abstract: A method, device, and system are disclosed. In one embodiment the method includes grouping multiple memory requests into multiple of memory rank queues. Each rank queue contains the memory requests that target addresses within the corresponding memory rank. The method also schedules a minimum burst number of memory requests within one of the memory rank queues to be serviced when the burst number has been reached in the one of the plurality of memory rank queues. Finally, if a memory request exceeds an aging threshold, then that memory request will be serviced.

Abstract translation: 公开了一种方法，装置和系统。 在一个实施例中，该方法包括将多个存储器请求分组成多个存储器秩队列。 每个排队队列包含针对相应内存等级内的地址的内存请求。 当在多个存储器排队列之一中已经达到突发数目时，该方法还调度在要服务的存储器秩队列之一内的一个存储器请求中的最小突发数量。 最后，如果内存请求超过老化阈值，那么该内存请求将被服务。

公开(公告)号：US07844876B2

公开(公告)日：2010-11-30

申请号：US11648122

申请日：2006-12-29

Applicant: David Wyatt ,  Christopher Cox ,  Howard David

Inventor： David Wyatt ,  Christopher Cox ,  Howard David

IPC: G01R31/30

CPC classification number: G01K1/026 ,  G01K2219/00

Abstract: In some embodiments the continuous measuring of temperature in remote memory devices operating within an electrically noisy environment is facilitated by coordinating the progressive approximation of temperature within quiescent periods of non-activity as known by a memory controller.

Abstract translation: 在一些实施例中，通过协调由存储器控制器已知的非活动的静止周期内的温度的逐渐逼近来促进在电噪声环境内操作的远程存储器件中的温度的连续测量。

公开(公告)号：US20080294928A1

公开(公告)日：2008-11-27

申请号：US11805082

申请日：2007-05-22

Applicant: Sandeep K. Jain ,  Howard David ,  Udayan Mukherjee

Inventor： Sandeep K. Jain ,  Howard David ,  Udayan Mukherjee

IPC: G06F1/04

CPC classification number: G06F1/3275 ,  G06F1/3225 ,  Y02D10/13 ,  Y02D10/14

Abstract: In one embodiment, the present invention includes a method determining if an access queue associated with a channel of a memory has been empty for a predetermined time period and if so, de-asserting a clock enable signal for all ranks of the channel of the memory, otherwise providing a next memory access request from the access queue to the channel of the memory. Other embodiments are described and claimed.

Abstract translation: 在一个实施例中，本发明包括一种确定与存储器的通道相关联的访问队列在预定时间段内是否为空的方法，如果是，则对存储器的通道的所有等级排除时钟使能信号 否则提供从存取队列到存储器的通道的下一个存储器访问请求。 描述和要求保护其他实施例。

公开(公告)号：US20080040408A1

公开(公告)日：2008-02-14

申请号：US11502235

申请日：2006-08-10

Applicant: David Wyatt ,  Christopher Cox ,  Howard David

Inventor： David Wyatt ,  Christopher Cox ,  Howard David

IPC: G06F7/00

CPC classification number: G01K1/026 ,  G01K2219/00

Abstract: In some embodiments, an apparatus may comprise one or more memory modules, a memory controller, a communication bus to couple the one or more memory modules to the memory controller, and logic to detect a quiesce signal in one or more memory modules, initiate, in response to the quiesce signal, a temperature approximation routine, and set a temperature flag when the temperature approximation routine converges to a temperature approximation. Other embodiments may be described.

Abstract translation: 在一些实施例中，装置可以包括一个或多个存储器模块，存储器控制器，用于将一个或多个存储器模块耦合到存储器控制器的通信总线，以及用于检测一个或多个存储器模块中的静默信号的逻辑， 响应于静止信号，温度近似程序，并且当温度近似程序收敛到温度近似时设置温度标志。 可以描述其他实施例。

公开(公告)号：US20060053243A1

公开(公告)日：2006-03-09

申请号：US10935835

申请日：2004-09-07

Applicant: Howard David ,  Bill Nale

Inventor： Howard David ,  Bill Nale

IPC: H03K17/16 ,  G06F13/14

CPC classification number: G06F13/4086 ,  G06F13/1684 ,  G06F13/4234 ,  Y02D10/14 ,  Y02D10/151

Abstract: Generating a pair of buses, each coupled to a common terminating device, each having a set of address signal lines that are coupled to a separate memory device, and driving one set of address signal lines with an address driven with true logic states while driving the other set of address signal lines with the same address, but driven to opposing logic states, to achieve a greater balance between the quantity of signals across both buses that are driven to a high state versus those that are driven to a low state.

Abstract translation: 产生一对总线，每对总线耦合到公共终端设备，每个总线具有耦合到单独的存储器件的一组地址信号线，并且驱动具有由真实逻辑状态驱动的地址的一组地址信号线，同时驱动 具有相同地址的另一组地址信号线，但被驱动到相反的逻辑状态，以便在被驱动到高状态的两个总线与被驱动到低状态的总线之间的信号量之间实现更大的平衡。