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公开(公告)号：US07804733B2
公开(公告)日：2010-09-28
申请号：US11968142
申请日：2007-12-31
Applicant: James W. Alexander , Edward R. Stanford , Devadatta V. Bodas , Howard David , Son H. Lam
Inventor： James W. Alexander , Edward R. Stanford , Devadatta V. Bodas , Howard David , Son H. Lam
IPC: G11C7/00
CPC classification number: G06F1/26 , G06F1/3225
Abstract: Embodiments of the invention supply power to DRAM or other memory devices with a multi-phase voltage regulator. A power controller coupled to the multi-phase voltage regulator causes one or more phases of the multi-phase voltage regulator to be activated or deactivated (shed) according to predetermined criteria. Embodiments of the invention thus improve power management by providing one or more reduced power states for the memory devices. Other embodiments are described.
Abstract translation: 本发明的实施例用多相电压调节器向DRAM或其他存储器件供电。 耦合到多相电压调节器的功率控制器根据预定标准使多相电压调节器的一个或多个相位被激活或去激活（脱落）。 因此，本发明的实施例通过为存储器件提供一个或多个降低的功率状态来改善功率管理。 描述其他实施例。
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公开(公告)号：US20090248994A1
公开(公告)日：2009-10-01
申请号：US12057132
申请日：2008-03-27
Applicant: Hongzhong Zheng , Ulf R. Hanebutte , Eugene Gorbatov , Howard David
Inventor： Hongzhong Zheng , Ulf R. Hanebutte , Eugene Gorbatov , Howard David
IPC: G06F12/00
CPC classification number: G06F9/5016 , G06F13/28 , Y02D10/14 , Y02D10/22
Abstract: A method, device, and system are disclosed. In one embodiment the method includes grouping multiple memory requests into multiple of memory rank queues. Each rank queue contains the memory requests that target addresses within the corresponding memory rank. The method also schedules a minimum burst number of memory requests within one of the memory rank queues to be serviced when the burst number has been reached in the one of the plurality of memory rank queues. Finally, if a memory request exceeds an aging threshold, then that memory request will be serviced
Abstract translation: 公开了一种方法，装置和系统。 在一个实施例中，该方法包括将多个存储器请求分组成多个存储器秩队列。 每个排队队列包含针对相应内存等级内的地址的内存请求。 当在多个存储器排队列之一中已经达到突发数目时，该方法还调度在要服务的存储器秩队列之一内的一个存储器请求中的最小突发数量。 最后，如果内存请求超过老化阈值，那么该内存请求将被服务
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公开(公告)号：US20090172442A1
公开(公告)日：2009-07-02
申请号：US11968142
申请日：2007-12-31
Applicant: James W. Alexander , Edward R. Stanford , Devadatta V. Bodas , Howard David , Son H. Lam
Inventor： James W. Alexander , Edward R. Stanford , Devadatta V. Bodas , Howard David , Son H. Lam
IPC: G06F1/00
CPC classification number: G06F1/26 , G06F1/3225
Abstract: Embodiments of the invention supply power to DRAM or other memory devices with a multi-phase voltage regulator. A power controller coupled to the multi-phase voltage regulator causes one or more phases of the multi-phase voltage regulator to be activated or deactivated (shed) according to predetermined criteria. Embodiments of the invention thus improve power management by providing one or more reduced power states for the memory devices. Other embodiments are described.
Abstract translation: 本发明的实施例用多相电压调节器向DRAM或其他存储器件供电。 耦合到多相电压调节器的功率控制器根据预定标准使多相电压调节器的一个或多个相位被激活或去激活（脱落）。 因此，本发明的实施例通过为存储器件提供一个或多个降低的功率状态来改善功率管理。 描述其他实施例。
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公开(公告)号：US07269025B2
公开(公告)日：2007-09-11
申请号：US11026606
申请日：2004-12-30
Applicant: Howard David
Inventor： Howard David
IPC: H05K7/00
CPC classification number: H05K1/181 , G11C5/04 , H01L23/50 , H01L25/0652 , H01L2224/16225 , H01L2924/09701 , H05K1/112 , H05K2201/10545 , H05K2201/10734 , Y02P70/611
Abstract: In some embodiments, a multichip package includes mounting pads to mount devices, such as integrated circuits, to a substrate, such as a printed circuit board, so that devices mutually placed on opposite surfaces of the substrate do not have interfering connections or connection vias. Other embodiments are described.
Abstract translation: 在一些实施例中，多芯片封装包括用于将诸如集成电路的器件安装到衬底（例如印刷电路板）的安装焊盘，使得相互放置在衬底的相对表面上的器件不具有干涉连接或连接通孔。 描述其他实施例。
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公开(公告)号：US20050289292A1
公开(公告)日：2005-12-29
申请号：US10881727
申请日：2004-06-29
Applicant: Warren Morrow , Eric Dahlen , Raman Nayyar , Jayamohan Dharanipathi , Howard David
Inventor： Warren Morrow , Eric Dahlen , Raman Nayyar , Jayamohan Dharanipathi , Howard David
Abstract: Some embodiments of the invention accurately account for power dissipation in memory systems that include individual memory modules by keeping track of the number of read requests, the number of write requests, and the number of activate requests that are applied to the individual memory modules during selected time periods. If the sum of these totals exceeds a threshold level, the embodiments throttle the memory system, either by throttling the entire memory system based in response to the most active memory module, or by throttling individual memory modules as needed. Other embodiments of the invention may assign the same or different weights to activate requests, read requests, and write requests. Other embodiments are described and claimed.
Abstract translation: 本发明的一些实施例通过在所选择的期间跟踪读取请求的数量，写入请求的数量和应用于各个存储器模块的激活请求的数量来准确地说明存储器系统中包括单独的存储器模块的功率消耗 时间段 如果这些总和的总和超过阈值水平，则实施例通过响应于最活跃的存储器模块来调节整个存储器系统或通过根据需要调节各个存储器模块来节制存储器系统。 本发明的其他实施例可以分配相同或不同的权重来激活请求，读请求和写请求。 描述和要求保护其他实施例。
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Patent Agency Ranking
公开(公告)号：US20050132131A1
公开(公告)日：2005-06-16
申请号：US10732635
申请日：2003-12-10
Applicant: Howard David
Inventor： Howard David
IPC: G06F12/00 , G11C5/00 , G11C11/4076 , G11C11/4094
CPC classification number: G11C11/4076 , G11C11/4094
Abstract: A “partial PRECHARGE command” is used to precharge a fraction of the banks in a multi-bank DRAM. In a first implementation the command precharges one half of the banks. In a second implementation the command precharges one quarter of the banks. The power drawn by the upper or lower bank precharge on the eight bank DRAM is the same as the power drawn by an “all bank” precharge on a four bank DRAM, without requiring the precharge period to be extended.
Abstract translation: “部分PRECHARGE”部分用于对多行DRAM中的一部分存储体进行预充电。 在第一个实施中，命令预充电一半的银行。 在第二个实施中，命令预充电四分之一的银行。 在八组DRAM上由上或下组预充电所得的功率与在四组DRAM上的“全库”预充电所得的功率相同，而不需要延长预充电周期。
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公开(公告)号：US07958380B2
公开(公告)日：2011-06-07
申请号：US11805082
申请日：2007-05-22
Applicant: Sandeep K. Jain , Howard David , Udayan Mukherjee
Inventor： Sandeep K. Jain , Howard David , Udayan Mukherjee
IPC: G06F1/32
CPC classification number: G06F1/3275 , G06F1/3225 , Y02D10/13 , Y02D10/14
Abstract: In one embodiment, the present invention includes a method determining if an access queue associated with a channel of a memory has been empty for a predetermined time period and if so, de-asserting a clock enable signal for all ranks of the channel of the memory, otherwise providing a next memory access request from the access queue to the channel of the memory. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，本发明包括一种确定与存储器的通道相关联的访问队列在预定时间段内是否为空的方法，如果是，则对存储器的通道的所有等级排除时钟使能信号 否则提供从存取队列到存储器的通道的下一个存储器访问请求。 描述和要求保护其他实施例。
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公开(公告)号：US20080039981A1
公开(公告)日：2008-02-14
申请号：US11648122
申请日：2006-12-29
Applicant: David Wyatt , Christopher Cox , Howard David
Inventor： David Wyatt , Christopher Cox , Howard David
IPC: G05D23/00
CPC classification number: G01K1/026 , G01K2219/00
Abstract: In some embodiments the continuous measuring of temperature in remote memory devices operating within an electrically noisy environment is facilitated by coordinating the progressive approximation of temperature within quiescent periods of non-activity as known by a memory controller.
Abstract translation: 在一些实施例中，通过协调由存储器控制器已知的非活动的静止周期内的温度的逐渐逼近来促进在电噪声环境内操作的远程存储器件中的温度的连续测量。
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公开(公告)号：US07318130B2
公开(公告)日：2008-01-08
申请号：US10881727
申请日：2004-06-29
Applicant: Warren R. Morrow , Eric J. Dahlen , Raman Nayyar , Jayamohan Dharanipathi , Howard David
Inventor： Warren R. Morrow , Eric J. Dahlen , Raman Nayyar , Jayamohan Dharanipathi , Howard David
IPC: G06F12/00
Abstract: Some embodiments of the invention accurately account for power dissipation in memory systems that include individual memory modules by keeping track of the number of read requests, the number of write requests, and the number of activate requests that are applied to the individual memory modules during selected time periods. If the sum of these totals exceeds a threshold level, the embodiments throttle the memory system, either by throttling the entire memory system based in response to the most active memory module, or by throttling individual memory modules as needed. Other embodiments of the invention may assign the same or different weights to activate requests, read requests, and write requests. Other embodiments are described and claimed.
Abstract translation: 本发明的一些实施例通过在所选择的期间跟踪读取请求的数量，写入请求的数量和应用于各个存储器模块的激活请求的数量来准确地说明存储器系统中包括单独的存储器模块的功率消耗 时间段 如果这些总和的总和超过阈值水平，则实施例通过响应于最活跃的存储器模块来调节整个存储器系统或通过根据需要调节各个存储器模块来节制存储器系统。 本发明的其他实施例可以分配相同或不同的权重来激活请求，读请求和写请求。 描述和要求保护其他实施例。
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公开(公告)号：US20060146509A1
公开(公告)日：2006-07-06
申请号：US11026606
申请日：2004-12-30
Applicant: Howard David
Inventor： Howard David
CPC classification number: H05K1/181 , G11C5/04 , H01L23/50 , H01L25/0652 , H01L2224/16225 , H01L2924/09701 , H05K1/112 , H05K2201/10545 , H05K2201/10734 , Y02P70/611
Abstract: In some embodiments, a multichip package includes mounting pads to mount devices, such as integrated circuits, to a substrate, such as a printed circuit board, so that devices mutually placed on opposite surfaces of the substrate do not have interfering connections or connection vias. Other embodiments are described.
Abstract translation: 在一些实施例中，多芯片封装包括用于将诸如集成电路的器件安装到衬底（例如印刷电路板）的安装焊盘，使得相互放置在衬底的相对表面上的器件不具有干涉连接或连接通孔。 描述其他实施例。
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