公开(公告)号：US08637992B2

公开(公告)日：2014-01-28

申请号：US13307395

申请日：2011-11-30

Applicant: Kazuo Sakuma ,  Ilyas Mohammed ,  Philip Damberg

Inventor： Kazuo Sakuma ,  Ilyas Mohammed ,  Philip Damberg

IPC: H01L23/48

CPC classification number: H01L21/563 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/05647 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/1329 ,  H01L2224/133 ,  H01L2224/14136 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32145 ,  H01L2224/32227 ,  H01L2224/3303 ,  H01L2224/33051 ,  H01L2224/331 ,  H01L2224/33505 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/8184 ,  H01L2224/8185 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2224/92125 ,  H01L2924/01322 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A microelectronic package can include a substrate having a first surface and a plurality of substrate contacts at the first surface and a microelectronic element having a front surface and contacts arranged within a contact-bearing region of the front surface. The contacts of the microelectronic element can face the substrate contacts and can be joined thereto. An underfill can be disposed between the substrate first surface and the contact-bearing region of the front surface of the microelectronic element. The underfill can reinforce the joints between the contacts and the substrate contacts. A joining material can bond the substrate first surface with the front surface of the microelectronic element. The joining material can have a Young's modulus less than 75% of a Young's modulus of the underfill.

Abstract translation: 微电子封装可以包括在第一表面具有第一表面和多个基板触点的基板和具有前表面的微电子元件和布置在前表面的接触区域内的触点。 微电子元件的触点可以面对基板触点并且可以与其接合。 可以在基板第一表面和微电子元件的前表面的接触区域之间设置底部填充物。 底部填充物可以加强触点和基板触点之间的接合。 接合材料可以将基板第一表面与微电子元件的前表面接合。 接合材料的杨氏模量可以小于底部填充物的杨氏模量的75％。

公开(公告)号：US08624348B2

公开(公告)日：2014-01-07

申请号：US13294226

申请日：2011-11-11

Applicant: Ilyas Mohammed

Inventor： Ilyas Mohammed

IPC: H01L29/66 ,  H01L21/00

CPC classification number: H01L21/78 ,  H01L23/3107 ,  H01L23/562 ,  H01L23/585 ,  H01L29/0657 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A microelectronic element is disclosed that includes a semiconductor chip and a continuous monolithic metallic edge-reinforcement ring that covers each of the plurality of edge surfaces of the semiconductor chip and extending onto the front surface. The semiconductor chip may have front and rear opposed surfaces and a plurality of contacts at the front surface and edge surfaces extending between the front and rear surfaces. The semiconductor chip may also embody at least an active device or a passive device.

Abstract translation: 公开了一种微电子元件，其包括覆盖半导体芯片的多个边缘表面中的每一个并延伸到前表面上的半导体芯片和连续的单片金属边缘加强环。 半导体芯片可以具有前表面和后相对表面以及在前表面和在前表面和后表面之间延伸的边缘表面的多个触点。 半导体芯片还可以具有至少一个有源器件或无源器件。

公开(公告)号：US08610259B2

公开(公告)日：2013-12-17

申请号：US12884695

申请日：2010-09-17

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Craig Mitchell ,  Piyush Savalia

IPC: H01L23/48

CPC classification number: H01L23/49827 ,  H01L21/6835 ,  H01L23/481 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/6622 ,  H01L2224/05009 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05555 ,  H01L2224/0557 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A microelectronic unit includes a semiconductor element consisting essentially of semiconductor material and having a front surface, a rear surface, a plurality of active semiconductor devices adjacent the front surface, a plurality of conductive pads exposed at the front surface, and an opening extending through the semiconductor element. At least one of the conductive pads can at least partially overlie the opening and can be electrically connected with at least one of the active semiconductor devices. The microelectronic unit can also include a first conductive element exposed at the rear surface for connection with an external component, the first conductive element extending through the opening and electrically connected with the at least one conductive pad, and a second conductive element extending through the opening and insulated from the first conductive element. The at least one conductive pad can overlie a peripheral edge of the second conductive element.

Abstract translation: 微电子单元包括基本上由半导体材料组成的半导体元件，其具有前表面，后表面，与前表面相邻的多个有源半导体器件，在前表面暴露的多个导电焊盘，以及延伸穿过 半导体元件。 至少一个导电焊盘可以至少部分地覆盖开口并且可以与至少一个有源半导体器件电连接。 微电子单元还可以包括暴露在后表面处以与外部部件连接的第一导电元件，第一导电元件延伸穿过开口并与至少一个导电焊盘电连接，第二导电元件延伸穿过开口 并与第一导电元件绝缘。 至少一个导电焊盘可以覆盖在第二导电元件的周边边缘上。

公开(公告)号：US08512491B2

公开(公告)日：2013-08-20

申请号：US12974611

申请日：2010-12-21

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: B32B41/00

CPC classification number: H01L22/12 ,  H01L21/67092

Abstract: A method of bonding a first substrate and a second substrate includes the steps of rotating first substrate with an adhesive mass thereon, and second substrate contacting the mass and overlying the first substrate, controlling a vertical height of a heated control platen spaced apart from and not contacting the second substrate so as to control a temperature of the adhesive mass, so as to at least one of bond the first and second substrates in alignment with one another, or achieve a sufficiently planar adhesive interface between the first and second substrates.

Abstract translation: 接合第一基板和第二基板的方法包括以下步骤：使第一基板与其上的粘合剂质量物质旋转，第二基板接触物料并覆盖第一基板，控制加热的控制台板的垂直高度， 使所述第二基板接触以控制所述粘合剂物料的温度，以便使所述第一和第二基板彼此对准的至少一个接合，或在所述第一和第二基板之间实现足够平坦的粘合界面。

公开(公告)号：US08476774B2

公开(公告)日：2013-07-02

申请号：US13316890

申请日：2011-12-12

Applicant: Belgacem Haba ,  Ilyas Mohammed ,  Vage Oganesian ,  David Ovrutsky ,  Laura Wills Mirkarimi

Inventor： Belgacem Haba ,  Ilyas Mohammed ,  Vage Oganesian ,  David Ovrutsky ,  Laura Wills Mirkarimi

IPC: H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L21/78 ,  H01L21/6835 ,  H01L23/5382 ,  H01L24/24 ,  H01L24/48 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68377 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/24145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06551 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.

Abstract translation: 微电子组件包括第一和第二堆叠的微电子元件，每个微电子元件具有沿前表面延伸并且至少其第一边缘延伸的间隔开的迹线。 绝缘区域可以接触每个微电子元件的边缘，并且每个微电子元件的迹线的至少部分延伸超过相应的第一边缘。 绝缘区域可以限定与微电子元件的第一和第二边缘相邻的第一和第二侧表面。 多个间隔开的开口可以沿着微电子组件的侧表面延伸。 与相应迹线连接的电导体可以具有设置在相应开口中并沿相应开口延伸的部分。 电导体可以延伸到覆盖在微电子元件中的一个的表面上的焊盘或焊球。

公开(公告)号：US20130122747A1

公开(公告)日：2013-05-16

申请号：US13296785

申请日：2011-11-15

Applicant: Cyprian Uzoh ,  Craig Mitchell ,  Belgacem Haba ,  Ilyas Mohammed

Inventor： Cyprian Uzoh ,  Craig Mitchell ,  Belgacem Haba ,  Ilyas Mohammed

IPC: H01R24/28

CPC classification number: H05K1/0271 ,  H01L23/49827 ,  H01L2924/0002 ,  H01R12/714 ,  H05K1/114 ,  H05K1/115 ,  H05K3/42 ,  H05K2201/09645 ,  H05K2201/10378 ,  H05K2203/0242 ,  H05K2203/025 ,  Y10T29/49165 ,  H01L2924/00

Abstract: An interconnection component includes an element with an opening, a plurality of conductors electrically insulted from one another extending through the opening, and a plurality of second contacts electrically insulated from one another. The element is comprised of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. At least some of the conductors extend along at least one inner surface of the opening. The conductors define a plurality of wettable first contacts at the first surface. The first contacts are at least partially aligned with the opening in a direction of the thickness and electrically insulated from one another.

Abstract translation: 互连部件包括具有开口的元件，延伸穿过开口彼此电绝缘的多个导体以及彼此电绝缘的多个第二触点。 该元件由热膨胀系数小于10ppm /℃的材料构成。 至少一些导体沿开口的至少一个内表面延伸。 导体在第一表面限定多个可润湿的第一接触。 第一触点在厚度方向上与开口至少部分地对齐，并且彼此电绝缘。

公开(公告)号：US20130010441A1

公开(公告)日：2013-01-10

申请号：US13618514

申请日：2012-09-14

Applicant: Vage Oganesian ,  Belgacem Haba ,  Craig Mitchell ,  Ilyas Mohammed ,  Piyush Savalia

Inventor： Vage Oganesian ,  Belgacem Haba ,  Craig Mitchell ,  Ilyas Mohammed ,  Piyush Savalia

IPC: H05K1/18 ,  H05K5/00

CPC classification number: H01L21/76819 ,  H01L21/76877 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/4985 ,  H01L23/5389 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/25 ,  H01L24/82 ,  H01L24/97 ,  H01L25/105 ,  H01L25/117 ,  H01L25/16 ,  H01L25/50 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/24227 ,  H01L2224/24247 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1029 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1052 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01061 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15156 ,  H01L2924/15165 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/157 ,  H01L2924/15788 ,  H01L2924/18161 ,  Y10T29/49002 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/83

Abstract: A microelectronic unit can include a carrier structure having a front surface, a rear surface remote from the front surface, and a recess having an opening at the front surface and an inner surface located below the front surface of the carrier structure. The microelectronic unit can also include a microelectronic element having a top surface adjacent the inner surface, a bottom surface remote from the top surface, and a plurality of contacts at the top surface. The microelectronic unit can also include terminals electrically connected with the contacts of the microelectronic element. The terminals can be electrically insulated from the carrier structure. The microelectronic unit can also include a dielectric region contacting at least the bottom surface of the microelectronic element. The dielectric region can define a planar surface located coplanar with or above the front surface of the carrier structure.

公开(公告)号：US20120326326A1

公开(公告)日：2012-12-27

申请号：US13168839

申请日：2011-06-24

Applicant: Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed

Inventor： Cyprian Uzoh ,  Vage Oganesian ,  Ilyas Mohammed

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L21/76898 ,  H01L21/3212 ,  H01L21/32125 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76852 ,  H01L21/7688 ,  H01L23/481 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods and apparatus for forming a semiconductor device are provided which may include any number of features. One feature is a method of forming an interconnect structure that results in the interconnect structure having a co-planar or flat top surface. Another feature is a method of forming an interconnect structure that results in the interconnect structure having a surface that is angled upwards greater than zero with respect to a top surface of the substrate. The interconnect structure can comprise a damascene structure, such as a single or dual damascene structure, or alternatively, can comprise a silicon-through via (TSV) structure.

Abstract translation: 提供了用于形成半导体器件的方法和装置，其可以包括任何数量的特征。 一个特征是形成互连结构的方法，其导致互连结构具有共面或平坦的顶表面。 另一个特征是形成互连结构的方法，其导致互连结构具有相对于衬底顶表面向上倾斜大于零的表面。 互连结构可以包括镶嵌结构，例如单镶嵌结构或双镶嵌结构，或者可以包括硅通孔（TSV）结构。

公开(公告)号：US20120313238A1

公开(公告)日：2012-12-13

申请号：US13155552

申请日：2011-06-08

Applicant: Hiroaki Sato ,  Yukio Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

Inventor： Hiroaki Sato ,  Yukio Hashimoto ,  Yoshikuni Nakadaira ,  Norihito Masuda ,  Belgacem Haba ,  Ilyas Mohammed ,  Philip Damberg

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L21/561 ,  H01L21/4857 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

Abstract: A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

Abstract translation: 微电子组件可以包括含有具有第一和第二相对表面的电介质元件的衬底。 电介质元件可以包括与第一表面相邻的第一电介质层，以及设置在第一介电层和第二表面之间的第二电介质层。 第一电介质层的杨氏模量可以比第二电介质层的杨氏模量大至少50％，小于二千兆帕（GPa）。 导电结构可以延伸穿过第一和第二电介质层，并且将第一表面处的基板触点与第二表面上的端子电连接。 衬底触点可以通过导电块与微电子元件的触点接合，并且刚性底部填充可以在微电子元件和第一表面之间。 端子可以用于将微电子组件接合到微电子组件外部的部件的触点。

公开(公告)号：US20120273933A1

公开(公告)日：2012-11-01

申请号：US13097943

申请日：2011-04-29

Applicant: Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

Inventor： Vage Oganesian ,  Belgacem Haba ,  Ilyas Mohammed ,  Piyush Savalia ,  Craig Mitchell

IPC: H01L23/12 ,  H01L21/58 ,  H01L23/488

CPC classification number: H01L25/50 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/82 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/24145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2225/06524 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/00

Abstract: A microelectronic assembly can include first, second and third stacked substantially planar elements, e.g., of dielectric or semiconductor material, and which may have a CTE of less than 10 ppm/° C. The assembly may be a microelectronic package and may incorporate active semiconductor devices in one, two or more of the first, second or third elements to function cooperatively as a system-in-a-package. In one example, an electrically conductive element having a minimum thickness less than 10 microns, may be formed by plating, and may electrically connect two or more of the first, second or third elements. The conductive element may entirely underlie a surface of another one of the substantially planar elements.

Abstract translation: 微电子组件可以包括例如电介质或半导体材料的第一，第二和第三堆叠的基本平坦的元件，并且其可以具有小于10ppm /℃的CTE。组件可以是微电子封装，并且可以并入有源半导体 在第一，第二或第三元件中的一个，两个或更多个元件中的装置可以协同地作为系统级封装。 在一个示例中，具有最小厚度小于10微米的导电元件可以通过电镀形成，并且可以电连接第一，第二或第三元件中的两个或更多个。 导电元件可以完全位于另一个基本上平面的元件的表面之下。