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    TRANSMIT-RECEIVE SWITCH WITH INTEGRATED POWER DETECTION
    14.
    发明申请
    TRANSMIT-RECEIVE SWITCH WITH INTEGRATED POWER DETECTION 审中-公开

    公开(公告)号：US20200295798A1

    公开(公告)日：2020-09-17

    申请号：US16737180

    申请日：2020-01-08

    Applicant: Integrated Device Technology, Inc.

    Inventor： Samet Zihir ,  Tumay Kanar ,  Himanshu Khatri

    IPC: H04B1/44 ,  H04B7/10

    Abstract: An apparatus includes a transmit-receive switch circuit and a detector circuit. The transmit-receive switch circuit may be connected between an input port, an output port, and a common port, and configured to switch a transmit radio-frequency signal from the input port to the common port in a transmit mode and a receive radio-frequency signal from the common port to the output port in a receive mode. The detector circuit may be integrated within the transmit-receive switch and may be configured to generate a power detection signal in response to at least one of the transmit radio-frequency signal or the receive radio-frequency signal.

    90 degree differential signal layout transition
    16.
    发明授权
    90 degree differential signal layout transition 有权

    公开(公告)号：US10587023B2

    公开(公告)日：2020-03-10

    申请号：US15880957

    申请日：2018-01-26

    Applicant: Integrated Device Technology, Inc.

    Inventor： Samet Zihir ,  Tumay Kanar ,  Naveen Krishna Yanduru

    IPC: H03H7/38 ,  H01P1/02 ,  H05K1/02 ,  H01P3/08 ,  H01P3/02 ,  H01Q1/24 ,  H05K1/11 ,  H01Q21/06

    Abstract: An apparatus includes a plurality of conductive layers and a plurality of traces configured to carry a plurality of signals through a change of direction. The traces may be routed parallel to each other in a first trace segment in a first of the conductive layers toward the change of direction. The traces may be routed parallel to each other in a second trace segment in a second of the conductive layers in the change of direction. One of the traces in a third trace segment in the first conductive layer may cross over another of the traces in the second trace segment in the second conductive layer in the change of direction. The traces may be routed parallel to each other in the third trace segment in the first conductive layer away from the change of direction.

    SYMMETRICAL FRONT-END CHIP FOR DUAL-POLE ANTENNA ARRAY
    17.
    发明申请
    SYMMETRICAL FRONT-END CHIP FOR DUAL-POLE ANTENNA ARRAY 审中-公开

    公开(公告)号：US20190089064A1

    公开(公告)日：2019-03-21

    申请号：US16050112

    申请日：2018-07-31

    Applicant: Integrated Device Technology, Inc.

    Inventor： Samet Zihir ,  Tumay Kanar

    IPC: H01Q21/00 ,  H01Q21/06 ,  H01Q19/30 ,  H01Q3/36 ,  H01Q3/28 ,  H01Q1/52

    Abstract: An apparatus includes a package and a beam former circuit. The package may be configured to be mounted on an antenna array at a center of four antenna elements. Each antenna element may include a dual-pole antenna having a vertical feed and a horizontal feed. The beam former circuit may be (i) disposed in the package, (ii) have a plurality of pairs of ports, (iii) configured to generate a plurality of radio-frequency signals in the ports while in a transmit mode and (iv) configured to receive the radio-frequency signals at the ports while in a receive mode. Each pair of the ports is configured to be directly connected to a respective one of the antenna elements. All of the ports may be spatially routed into alignment with the vertical feeds and the horizontal feeds in a single conductive plane of the antenna array.

    Multi-mode control with fast-access lookup table implementation
    18.
    发明授权
    Multi-mode control with fast-access lookup table implementation 有权

    公开(公告)号：US10750377B1

    公开(公告)日：2020-08-18

    申请号：US16367711

    申请日：2019-03-28

    Applicant: Integrated Device Technology, Inc.

    Inventor： Samet Zihir ,  Kevin Sheng ,  Mark Cuezon ,  Himanshu Khatri

    IPC: H04L12/28 ,  H04W16/28 ,  H04B7/185 ,  H01Q3/26 ,  H04W72/04

    Abstract: An apparatus comprises a plurality of transceiver circuits, a memory, and an interface circuit. The memory generally embodies a table associating a plurality of index values with corresponding gain and phase values for each channel of each of the transceiver circuits. In a first mode, the interface circuit may be configured to receive the corresponding gain and phase values associated with each of the plurality of index values and store the corresponding gain and phase values in the table. In a second mode, the interface circuit, in response to receiving one of the index values, configures each channel of each of the transceiver circuits with the corresponding gain and phase values from the table.

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