公开(公告)号：US20160275920A1

公开(公告)日：2016-09-22

申请号：US14662603

申请日：2015-03-19

Applicant: Intel Corporation

Inventor： Michael Apodaca ,  Thomas A. Piazza ,  Bimal Poddar

IPC: G09G5/39 ,  G06T1/60

CPC classification number: G09G5/39 ,  G06T1/60 ,  G06T15/005 ,  G06T15/40

Abstract: The introduction of an “out-of-memory” marker in the sorted tile geometry sequence for a tile may aid in handling out-of-memory frames. This marker allows hardware to continue rendering using the original data stream instead of the sorted data stream. This enables use of the original data stream allows the system to continue rendering without requiring any driver intervention. During the visibility generation/sorting phase, the number of memory pages required for storing the data for a rendering pass is continuously tracked. This tracking includes tracking the pages that are required even if the hardware had not run out-of-memory. This information can be monitored by a graphics driver and the driver can provide more memory pages for the system to work at full efficiency.

Abstract translation: 在瓦片的排序瓦片几何序列中引入“内存不足”标记可能有助于处理超出内存的帧。 该标记允许硬件使用原始数据流而不是排序的数据流继续渲染。 这使得能够使用原始数据流允许系统继续呈现而不需要任何驱动器干预。 在可见性生成/分类阶段期间，持续追踪存储渲染通过数据所需的存储器页数。 该跟踪包括跟踪所需的页面，即使硬件没有运行内存不足。 该信息可以由图形驱动程序监视，驱动程序可以为系统提供更多的内存页面，以便全面工作。

公开(公告)号：US09589312B2

公开(公告)日：2017-03-07

申请号：US14577922

申请日：2014-12-19

Applicant: INTEL CORPORATION

Inventor： Bimal Poddar

IPC: G06T1/00 ,  G06T15/00 ,  G06T1/20

CPC classification number: G06T1/20 ,  G06T1/60 ,  G06T2200/28

Abstract: A mechanism is described for dynamically optimizing color buffer clear performance in graphics processing units. A method of embodiments, as described herein, includes allocating and initializing a first set of control bits associated with a framebuffer in a graphics processing unit (GPU), and rendering a first frame, wherein the first set of control bits are associated with the first frame. The method may further include allocating a second set of control bits associated with a second frame, and rendering the second frame. The method may further include facilitating an expedited resolve operation of the second frame based on a frame-to-frame coherence associated with the first and second frames.

Abstract translation: 描述了一种用于在图形处理单元中动态优化色彩缓冲区清晰性能的机制。 如本文所述的实施例的方法包括分配和初始化与图形处理单元（GPU）中的帧缓冲器相关联的第一组控制位，并且渲染第一帧，其中第一组控制位与第一组相关联 帧。 该方法还可以包括分配与第二帧相关联的第二组控制位，并且渲染第二帧。 该方法还可以包括基于与第一帧和第二帧相关联的帧到帧相干性来促进第二帧的加速解析操作。