公开(公告)号：US20230307379A1

公开(公告)日：2023-09-28

申请号：US17703768

申请日：2022-03-24

Applicant: Intel Corporation

Inventor： Phil GENG ,  Patrick NARDI ,  Ravindranath V. MAHAJAN ,  Dingying David XU ,  Prasanna RAGHAVAN ,  John HARPER ,  Sanjoy SAHA ,  Yang JIAO

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/49816

Abstract: Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate, and a die coupled to the package substrate. In an embodiment, the electronic package further comprises a stiffener on the package substrate surrounding the die. In an embodiment, the stiffener is a ring with one or more corner regions and one or more beams. In an embodiment, each beam is between a pair of corner regions, and the one or more corner regions have a first thickness and the one or more beams have a second thickness that is greater than the first thickness.

公开(公告)号：US20210327800A1

公开(公告)日：2021-10-21

申请号：US17364686

申请日：2021-06-30

Applicant: Intel Corporation

Inventor： Hongxia FENG ,  Dingying David XU ,  Sheng C. LI ,  Matthew L. TINGEY ,  Meizi JIAO ,  Chung Kwang Christopher TAN

IPC: H01L23/498 ,  H01L23/13 ,  H01L21/48 ,  H01L23/538

Abstract: A package substrate and package assembly including a package substrate including a substrate body including electrical routing features therein and a surface layer and a plurality of first and second contact points on the surface layer including a first pitch and a second pitch, respectively, wherein the plurality of first contact points and the plurality of second contact points are continuous posts to the respective ones of the electrical routing features. A method including forming first conductive vias in a package assembly, wherein the first conductive vias include substrate conductive vias to electrical routing features in a package substrate and bridge conductive vias to bridge surface routing features of a bridge substrate; forming a first surface layer and a second surface layer on the package substrate; and forming second conductive vias through each of the first surface layer and the second surface layer to the bridge conductive vias.