公开(公告)号：US20190004862A1

公开(公告)日：2019-01-03

申请号：US15637003

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij A. Doshi ,  Andrew J. Herdrich ,  Edwin Verplanke ,  Daniel Rivas Barragan

IPC: G06F9/50

Abstract: Technologies for managing quality of service of a platform interconnect include a compute device. The compute device includes one or more processors, one or more resources capable of being utilized by the one or more processors, and a platform interconnect to facilitate communication of messages between the one or more processors and the one or more resources. The compute device is to obtain class of service data for one or more workloads to be executed by the compute device. The class of service data is indicative of a capacity of one or more of the resources to be utilized in the execution of each corresponding workload. The compute device is also to execute the one or more workloads and manage the amount of traffic transmitted through the platform interconnect for each corresponding workload as a function of the class of service data as the one or more workloads are executed.

公开(公告)号：US20180352311A1

公开(公告)日：2018-12-06

申请号：US15913357

申请日：2018-03-06

Applicant: Intel Corporation

Inventor： Andrew J. Herdrich ,  Patrick L. Connor ,  Dinesh Kumar ,  Alexander W. Min ,  Daniel J. Dahle ,  Kapil Sood ,  Jeffrey B. Shaw ,  Edwin Verplanke ,  Scott P. Dubal ,  James Robert Hearn

IPC: H04Q9/02 ,  H04L12/26 ,  H04L12/24

CPC classification number: H04Q9/02 ,  H04L41/5009 ,  H04L41/5019 ,  H04L43/08 ,  H04L43/10

Abstract: Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.

公开(公告)号：US20170192887A1

公开(公告)日：2017-07-06

申请号：US15401220

申请日：2017-01-09

Applicant: Intel Corporation

Inventor： Andrew J. Herdrich ,  Edwin Verplanke ,  Ravishankar Iyer ,  Christopher C. Gianos ,  Jeffrey D. Chamberlain ,  Ronak Singhal ,  Julius Mandelblat ,  Bret L. Toll

IPC: G06F12/0804 ,  G06F12/084 ,  G06F12/0897 ,  G06F12/0864 ,  G06F12/0875 ,  G06F12/0811 ,  G06F12/0842

CPC classification number: G06F12/0804 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/0848 ,  G06F12/0864 ,  G06F12/0875 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/123 ,  G06F12/128 ,  G06F2212/1004 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/604

Abstract: Systems and methods for cache allocation with code and data prioritization. An example system may comprise: a cache; a processing core, operatively coupled to the cache; and a cache control logic, responsive to receiving a cache fill request comprising an identifier of a request type and an identifier of a class of service, to identify a subset of the cache corresponding to a capacity bit mask associated with the request type and the class of service.

公开(公告)号：US09563564B2

公开(公告)日：2017-02-07

申请号：US14680287

申请日：2015-04-07

Applicant: Intel Corporation

Inventor： Andrew J. Herdrich ,  Edwin Verplanke ,  Ravishankar Iyer ,  Christopher C. Gianos ,  Jeffrey D. Chamberlain ,  Ronak Singhal ,  Julius Mandelblat ,  Bret L. Toll

IPC: G06F12/08

CPC classification number: G06F12/0804 ,  G06F12/0811 ,  G06F12/084 ,  G06F12/0842 ,  G06F12/0848 ,  G06F12/0864 ,  G06F12/0875 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/123 ,  G06F12/128 ,  G06F2212/1004 ,  G06F2212/1016 ,  G06F2212/1024 ,  G06F2212/604

Abstract: Systems and methods for cache allocation with code and data prioritization. An example system may comprise: a cache; a processing core, operatively coupled to the cache; and a cache control logic, responsive to receiving a cache fill request comprising an identifier of a request type and an identifier of a class of service, to identify a subset of the cache corresponding to a capacity bit mask associated with the request type and the class of service.

Abstract translation: 具有代码和数据优先级的缓存分配的系统和方法。 示例系统可以包括：高速缓存; 处理核心，可操作地耦合到高速缓存; 以及高速缓存控制逻辑，响应于接收到包括请求类型的标识符和服务等级的标识符的高速缓存填充请求，以识别对应于与请求类型和类别相关联的容量位掩码的高速缓存的子集 的服务。

公开(公告)号：US12197601B2

公开(公告)日：2025-01-14

申请号：US17560193

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Ren Wang ,  Sameh Gobriel ,  Somnath Paul ,  Yipeng Wang ,  Priya Autee ,  Abhirupa Layek ,  Shaman Narayana ,  Edwin Verplanke ,  Mrittika Ganguli ,  Jr-Shian Tsai ,  Anton Sorokin ,  Suvadeep Banerjee ,  Abhijit Davare ,  Desmond Kirkpatrick ,  Rajesh M. Sankaran ,  Jaykant B. Timbadiya ,  Sriram Kabisthalam Muthukumar ,  Narayan Ranganathan ,  Nalini Murari ,  Brinda Ganesh ,  Nilesh Jain

IPC: G06F15/78 ,  G06F9/50 ,  G06F21/62 ,  G06F21/72

Abstract: Examples described herein relate to offload circuitry comprising one or more compute engines that are configurable to perform a workload offloaded from a process executed by a processor based on a descriptor particular to the workload. In some examples, the offload circuitry is configurable to perform the workload, among multiple different workloads. In some examples, the multiple different workloads include one or more of: data transformation (DT) for data format conversion, Locality Sensitive Hashing (LSH) for neural network (NN), similarity search, sparse general matrix-matrix multiplication (SpGEMM) acceleration of hash based sparse matrix multiplication, data encode, data decode, or embedding lookup.

公开(公告)号：US11695628B2

公开(公告)日：2023-07-04

申请号：US17505262

申请日：2021-10-19

Applicant: Intel Corporation

Inventor： Rashmin Patel ,  Monica Kenguva ,  Francesc Guim Bernat ,  Edwin Verplanke ,  Andrew J. Herdrich

IPC: H04L41/0816 ,  H04L41/14 ,  H04L67/10

CPC classification number: H04L41/0816 ,  H04L41/14 ,  H04L67/10

Abstract: Technologies for analyzing and optimizing workloads (e.g., virtual network functions) executing on edge resources are disclosed. According to one embodiment disclosed herein, a compute device launches a virtualized system including a virtual network function and a performance manager, the performance manager to monitor a current resource usage of the virtual network function as a function of a performance profile. The compute device determines, in response to a determination that one or more quality-of-service (QoS) requirements is not satisfied, whether one or more resources from the platform are available for satisfying the QoS requirements. The compute device receives, in response to a determination that the one or more resources are available for satisfying the QoS requirements, the one or more resources and updates the performance profile as a function of the received resources.

公开(公告)号：US11520700B2

公开(公告)日：2022-12-06

申请号：US17042037

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Malini K. Bhandaru ,  Iosif Gasparakis ,  Sunku Ranganath ,  Liyong Qiao ,  Rui Zang ,  Dakshina Ilangovan ,  Shaohe Feng ,  Edwin Verplanke ,  Priya Autee ,  Lin A. Yang

IPC: G06F12/08 ,  G06F9/50 ,  G06F9/54 ,  G06F12/0806

Abstract: A holistic view of cache class of service (CLOS) to include an allocation of processor cache resources to a plurality of CLOS. The allocation of processor cache resources to include allocation of cache ways for an n-way set of associative cache. Examples include monitoring usage of the plurality of CLOS to determine processor cache resource usage and to report the processor cache resource usage.

公开(公告)号：US11500681B2

公开(公告)日：2022-11-15

申请号：US15637003

申请日：2017-06-29

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij A. Doshi ,  Andrew J. Herdrich ,  Edwin Verplanke ,  Daniel Rivas Barragan

IPC: G06F9/50 ,  H04L67/1008 ,  G06F13/38 ,  G06F9/46

Abstract: A compute device includes one or more processors, one or more resources capable of being utilized by the one or more processors, and a platform interconnect to facilitate communication of messages between the one or more processors and the one or more resources. The compute device is to obtain class of service data for one or more workloads to be executed by the compute device. The class of service data is indicative of a capacity of one or more of the resources to be utilized in the execution of each corresponding workload. The compute device is also to execute the one or more workloads and manage the amount of traffic transmitted through the platform interconnect for each corresponding workload as a function of the class of service data as the one or more workloads are executed.

公开(公告)号：US20220191602A1

公开(公告)日：2022-06-16

申请号：US17687132

申请日：2022-03-04

Applicant: Intel Corporation

Inventor： Andrew J. Herdrich ,  Patrick L. Connor ,  Dinesh Kumar ,  Alexander W. MIN ,  Daniel J. DAHLE ,  Kapil Sood ,  Jeffrey B. SHAW ,  Edwin Verplanke ,  Scott P. Dubal ,  James Robert Hearn

IPC: H04Q9/02 ,  H04L41/5019 ,  H04L41/5009 ,  H04L43/10

Abstract: Devices and techniques for out-of-band platform tuning and configuration are described herein. A device can include a telemetry interface to a telemetry collection system and a network interface to network adapter hardware. The device can receive platform telemetry metrics from the telemetry collection system, and network adapter silicon hardware statistics over the network interface, to gather collected statistics. The device can apply a heuristic algorithm using the collected statistics to determine processing core workloads generated by operation of a plurality of software systems communicatively coupled to the device. The device can provide a reconfiguration message to instruct at least one software system to switch operations to a different processing core, responsive to detecting an overload state on at least one processing core, based on the processing core workloads. Other embodiments are also described.

公开(公告)号：US11171831B2

公开(公告)日：2021-11-09

申请号：US16370985

申请日：2019-03-30

Applicant: Intel Corporation

Inventor： Rashmin Patel ,  Monica Kenguva ,  Francesc Guim Bernat ,  Edwin Verplanke ,  Andrew J. Herdrich

IPC: H04L29/08 ,  H04L12/24

Abstract: Technologies for analyzing and optimizing workloads (e.g., virtual network functions) executing on edge resources are disclosed. According to one embodiment disclosed herein, a compute device launches a virtualized system including a virtual network function and a performance manager, the performance manager to monitor a current resource usage of the virtual network function as a function of a performance profile. The compute device determines, in response to a determination that one or more quality-of-service (QoS) requirements is not satisfied, whether one or more resources from the platform are available for satisfying the QoS requirements. The compute device receives, in response to a determination that the one or more resources are available for satisfying the QoS requirements, the one or more resources and updates the performance profile as a function of the received resources.