公开(公告)号：US20190121765A1

公开(公告)日：2019-04-25

申请号：US16221962

申请日：2018-12-17

Applicant: Intel Corporation

Inventor： Amit Kumar Srivastava ,  Asad Azam ,  Rajesh Bhaskar ,  Mikal Hunsaker ,  Enrico D. Carrieri

IPC: G06F13/364 ,  H04L12/801 ,  H04L12/835 ,  G06F13/24 ,  G06F13/16 ,  G06F13/42 ,  H04L5/16

Abstract: In one embodiment, a host controller includes: a first credit tracker comprising at least one credit counter to maintain credit information for a first device; and a first credit handler to send a command code having a first predetermined value to indicate a credit request to request credit information from the first device, where the first credit tracker is to update the at least one credit counter based on receipt of an in-band interrupt from the first device having the credit information. Other embodiments are described and claimed.

公开(公告)号：US20190049513A1

公开(公告)日：2019-02-14

申请号：US16017764

申请日：2018-06-25

Applicant: Intel Corporation

Inventor： Asad Azam ,  Amit K. Srivastava ,  Enrico Carrieri ,  Rajesh Bhaskar

IPC: G01R31/28 ,  G01R31/3185 ,  G01R31/3177

Abstract: An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.