公开(公告)号：US11721765B2

公开(公告)日：2023-08-08

申请号：US17499908

申请日：2021-10-13

Applicant: Japan Display Inc.

Inventor： Hajime Watakabe ,  Tomoyuki Ito ,  Toshihide Jinnai ,  Isao Suzumura ,  Akihiro Hanada ,  Ryo Onodera

IPC: H01L21/00 ,  H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L21/02 ,  H01L21/426 ,  H01L21/4757 ,  H01L21/4763 ,  H01L29/66 ,  G02F1/1368

CPC classification number: H01L29/78627 ,  H01L21/02178 ,  H01L21/02565 ,  H01L21/426 ,  H01L21/47573 ,  H01L21/47635 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/24 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78633 ,  H01L29/78675 ,  G02F1/1368 ,  H01L2029/42388

Abstract: A semiconductor device includes thin film transistors each having an oxide semiconductor. The oxide semiconductor has a channel region, a drain region, a source region, and low concentration regions which are lower in impurity concentration than the drain region and the source region. The low concentration regions are located between the channel region and the drain region, and between the channel region and the source region. Each of the thin film transistors has a gate insulating film on the channel region and the low concentration regions, an aluminum oxide film on a first part of the gate insulating film, the first part being located on the channel region, and a gate electrode on the aluminum oxide film and a second part of the gate insulating film, the second part being located on the low concentration regions.