公开(公告)号：US20120254515A1

公开(公告)日：2012-10-04

申请号：US13365232

申请日：2012-02-02

Applicant: Ashot MELIK-MARTIROSIAN ,  Pablo Alejandro ZIPEROVICH ,  Mark MOSHAYEDI

Inventor： Ashot MELIK-MARTIROSIAN ,  Pablo Alejandro ZIPEROVICH ,  Mark MOSHAYEDI

IPC: G11C16/14 ,  G06F12/02

CPC classification number: G11C16/14 ,  G06F12/0246 ,  G11C11/5635 ,  G11C16/16 ,  G11C2216/20

Abstract: A method for suspending an erase operation performed on a group of memory cells in a flash memory circuit is disclosed. One example method includes providing to the memory circuit a command to erase the group of memory cells via a plurality of erase pulses. After applying an erase pulse, if it is determined that another operation has a priority higher than a predetermined threshold, the method suspends the erase operation, performs the other operation, and then resumes the erase operation.

Abstract translation: 公开了一种用于暂停对闪速存储器电路中的一组存储器单元执行的擦除操作的方法。 一个示例性方法包括向存储器电路提供经由多个擦除脉冲擦除存储器单元组的命令。 在施加擦除脉冲之后，如果确定另一操作具有高于预定阈值的优先级，则该方法暂停擦除操作，执行另一操作，然后恢复擦除操作。

公开(公告)号：US20120239854A1

公开(公告)日：2012-09-20

申请号：US12779003

申请日：2010-05-12

Applicant: Po-Jen HSUEH ,  Richard A. MATAYA ,  Mark MOSHAYEDI

Inventor： Po-Jen HSUEH ,  Richard A. MATAYA ,  Mark MOSHAYEDI

IPC: G06F12/02 ,  G06F12/08

CPC classification number: G06F12/0833 ,  G06F11/076 ,  G06F12/0246 ,  G06F12/0284 ,  G06F12/0866 ,  G06F12/1009 ,  G06F2212/2022 ,  G06F2212/466 ,  G06F2212/62 ,  G06F2212/7208 ,  G06F2212/7209 ,  G11C16/3418 ,  G11C16/349

Abstract: A flash storage device includes a first memory, a flash memory comprising a plurality of physical blocks, each of the plurality of physical blocks comprising a plurality of physical pages, and a controller. The controller is configured to store, in the first memory, copies of data read from the flash memory, map a logical address in a read request received from a host system to a virtual unit address and a virtual page address, and check a virtual unit cache tag table stored in the first memory based on the virtual unit address. If a hit is found in the virtual unit cache tag table, a virtual page cache tag sub-table stored in the first memory is checked based on the virtual page address, wherein the virtual page cache tag sub-table is associated with the virtual unit address. If a hit is found in the virtual page cache tag sub-table, data stored in the first memory mapped to the hit in the virtual page cache tag sub-table is read in response to the read request received from the host system.

Abstract translation: 闪存存储设备包括第一存储器，包括多个物理块的闪速存储器，所述多个物理块中的每一个包括多个物理页面，以及控制器。 控制器被配置为在第一存储器中存储从闪存读取的数据的副本，将从主机系统接收的读取请求中的逻辑地址映射到虚拟单元地址和虚拟页面地址，并且检查虚拟单元 基于虚拟单元地址存储在第一存储器中的缓存标签表。 如果在虚拟单元缓存标签表中发现命中，则基于虚拟页面地址检查存储在第一存储器中的虚拟页面缓存标签子表，其中虚拟页面缓存标签子表与虚拟单元相关联 地址。 如果在虚拟页面高速缓存标签子表中发现命中，则响应于从主机系统接收到的读取请求读取存储在映射到虚拟页缓存标签子表中的命中的第一存储器中的数据。

公开(公告)号：US20110022782A1

公开(公告)日：2011-01-27

申请号：US12509404

申请日：2009-07-24

Applicant: Mark MOSHAYEDI

Inventor： Mark MOSHAYEDI

IPC: G06F12/00 ,  G06F12/02 ,  G06F13/36

CPC classification number: G06F13/1668 ,  G06F2212/7208 ,  G06F2213/0042

Abstract: A flash storage system includes a flash storage controller coupled to storage modules of a flash storage array via universal serial buses. Each storage module includes at least one flash memory device. The flash storage controller receives a programming command of a communication protocol and generates universal serial bus commands based on the programming command. The flash storage controller issues the universal serial bus commands to storage modules in the flash storage array via the universal serial buses. The storage modules process the universal serial bus commands to access data in the flash storage devices of the storage modules.

Abstract translation: 闪存存储系统包括通过通用串行总线耦合到闪存阵列的存储模块的闪存控制器。 每个存储模块包括至少一个闪存器件。 闪存控制器接收通信协议的编程命令，并根据编程命令生成通用串行总线命令。 闪存控制器通过通用串行总线向闪存阵列中的存储模块发出通用串行总线命令。 存储模块处理通用串行总线命令以访问存储模块的闪存存储设备中的数据。

公开(公告)号：US20120257454A1

公开(公告)日：2012-10-11

申请号：US13530026

申请日：2012-06-21

Applicant: Mark MOSHAYEDI

Inventor： Mark MOSHAYEDI

IPC: G11C16/04

CPC classification number: G11C16/30 ,  G11C5/141 ,  G11C5/144 ,  G11C16/10

Abstract: A flash storage device includes a power hold circuit including a double layer capacitor. A power source supplies power to the flash storage device and charges the double layer capacitor. The double layer capacitor supplies power for maintaining integrity of data during a data transfer occurring in the flash storage device when the power supplied by the power source is disrupted. Additionally, the flash storage device can inhibit subsequent data transfers until the power supplied by the power source is restored.

Abstract translation: 闪存存储装置包括具有双层电容器的功率保持电路。 电源为闪存存储设备供电并对双层电容器充电。 当由电源供应的电力被破坏时，双层电容器在闪存存储设备期间的数据传送期间为保持数据的完整性提供电力。 此外，闪存存储装置可以禁止随后的数据传送，直到恢复由电源供应的电力。

公开(公告)号：US20120239990A1

公开(公告)日：2012-09-20

申请号：US12779001

申请日：2010-05-12

Applicant: Richard A. MATAYA ,  Po-Jen HSUEH ,  Mark MOSHAYEDI

Inventor： Richard A. MATAYA ,  Po-Jen HSUEH ,  Mark MOSHAYEDI

IPC: G06F12/02 ,  G06F11/00

CPC classification number: G06F12/0833 ,  G06F11/076 ,  G06F12/0246 ,  G06F12/0284 ,  G06F12/0866 ,  G06F12/1009 ,  G06F2212/2022 ,  G06F2212/466 ,  G06F2212/62 ,  G06F2212/7208 ,  G06F2212/7209 ,  G11C16/3418 ,  G11C16/349

Abstract: A method for managing a flash storage device includes initiating a read request and reading requested data from a first storage block of a plurality of storage blocks in the flash storage device based on the read request. The method further includes incrementing a read count for the first storage block and moving the data in the first storage block to an available storage block of the plurality of storage blocks when the read count reaches a first threshold value.

Abstract translation: 一种用于管理闪存存储设备的方法，包括基于所读取的请求，从闪存存储设备中的多个存储块的第一存储块启动读取请求并读取所请求的数据。 该方法还包括当读取计数达到第一阈值时，增加第一存储块的读取计数并将第一存储块中的数据移动到多个存储块中的可用存储块。

公开(公告)号：US20100205349A1

公开(公告)日：2010-08-12

申请号：US12369032

申请日：2009-02-11

Applicant: Mark MOSHAYEDI ,  Douglas Finke

Inventor： Mark MOSHAYEDI ,  Douglas Finke

IPC: G06F13/00

CPC classification number: G06F11/1441 ,  G11C5/14 ,  G11C5/143

Abstract: A memory device for use with a primary power source, includes volatile memory including a plurality of memory segments defined by at least one starting addresses and a corresponding at least one ending address; an interface for connecting to a backup power source; a non-volatile memory; and a controller in communication with the volatile memory and the non-volatile memory programmed to detect a loss of power of the primary power source and in response to move data from the volatile memory to the non-volatile memory based on the at least one starting address and the at least one ending address. In some aspects, there is only one starting address and one ending address and only data that is stored in the volatile memory at addresses between the one starting address and one ending address is moved to the non-volatile memory.

Abstract translation: 一种用于主电源的存储器件，包括易失性存储器，包括由至少一个起始地址和对应的至少一个结束地址定义的多个存储器段; 用于连接到备用电源的接口; 非易失性存储器; 以及控制器，其与所述易失性存储器和所述非易失性存储器通信，所述非易失性存储器被编程为检测所述主电源的功率损失，并且响应于将数据从所述易失性存储器移动到所述非易失性存储器，基于所述至少一个启动 地址和至少一个结束地址。 在一些方面，仅有一个起始地址和一个结束地址，并且只有在一个起始地址和一个结束地址之间的地址处存储在易失性存储器中的数据被移动到非易失性存储器。

公开(公告)号：US20100202240A1

公开(公告)日：2010-08-12

申请号：US12369040

申请日：2009-02-11

Applicant: Mark MOSHAYEDI ,  Douglas Finke

Inventor： Mark MOSHAYEDI ,  Douglas Finke

IPC: G11C5/14 ,  G06F12/00 ,  G06F11/30 ,  G06F11/20 ,  G06F11/16 ,  G06F12/02

CPC classification number: G11C5/141 ,  G06F11/1441 ,  G06F12/0802 ,  G06F2212/1032 ,  G11C5/04 ,  G11C5/143 ,  G11C5/147 ,  G11C16/22 ,  G11C16/30 ,  Y02D10/13

Abstract: A device includes: non-volatile memory; a controller in communication with the non-volatile memory, wherein the controller is programmed to move data from a volatile memory to the non-volatile memory upon a loss of power of a primary power source of the volatile memory; and a backup power supply providing temporary power to the controller and the volatile memory upon the loss of power of the primary power source, including: a capacitor bank with an output terminal; a connection to a voltage source that charges the capacitor bank to a normal operating voltage; and a state-of-health monitor that is programmed to generate a failure signal based on a voltage at the output terminal of the capacitor bank.

Abstract translation: 一种设备包括：非易失性存储器; 与所述非易失性存储器通信的控制器，其中所述控制器被编程为在所述易失性存储器的主电源的功率损失时将数据从易失性存储器移动到所述非易失性存储器; 以及备用电源，其在主电源的功率损失时向控制器和易失性存储器提供临时电力，包括：具有输出端子的电容器组; 连接到将电容器组充电到正常工作电压的电压源; 以及健康状态监视器，其被编程为基于电容器组的输出端子处的电压来产生故障信号。