-
公开(公告)号：US20200027825A1
公开(公告)日：2020-01-23
申请号：US16585180
申请日：2019-09-27
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Ryota ASAI , Issei YAMAMOTO
IPC: H01L23/498 , H01L25/16 , H01L21/48
Abstract: A wiring substrate that is provided enables stray capacitance between a first electrode and a second electrode to be prevented from varying when an undulation occurs in the wiring substrate. Insulating layers are stacked. A first electrode and a second electrode are formed between the same layers at an interval. The thickness of the first electrode is more than the thickness of the second electrode. The lower main surface of the first electrode is located at a position lower than the lower main surface of the second electrode, and the upper main surface of the first electrode is located at a position higher than the upper main surface of the second electrode when seen through in a direction perpendicular to a stacking direction of the insulating layers.
-
公开(公告)号：US20140261969A1
公开(公告)日：2014-09-18
申请号：US14294203
申请日：2014-06-03
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Jun ADACHI , Jun URAKAWA , Issei YAMAMOTO
CPC classification number: H02H9/04 , H01B1/20 , H01T4/10 , H01T4/12 , H01T21/00 , H02H9/044 , H05K9/0067 , H05K9/0069 , H05K9/0079 , Y10T29/49002
Abstract: An ESD protection device is manufactured such that its ESD characteristics are easily adjusted and stabilized. The ESD protection device includes an insulating substrate, a cavity provided in the insulating substrate, at least one pair of discharge electrodes each including a portion exposed in the cavity, the exposed portions being arranged to face each other, and external electrodes provided on a surface of the insulating substrate and connected to the at least one pair of discharge electrodes. A particulate supporting electrode material having conductivity is dispersed between the exposed portions of the at least one pair of discharge electrodes in the cavity
Abstract translation: 制造ESD保护装置，使其ESD特性容易调节和稳定。 ESD保护装置包括绝缘基板，设置在绝缘基板中的空腔，至少一对放电电极，每一对放电电极各自包括暴露在空腔中的部分，暴露部分彼此相对布置，外部电极设置在表面上 并连接到所述至少一对放电电极。 具有导电性的颗粒状支撑电极材料分散在空腔中的至少一对放电电极的露出部分之间
-
公开(公告)号：US20130077262A1
公开(公告)日：2013-03-28
申请号：US13684608
申请日：2012-11-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Issei YAMAMOTO , Akihiko KAMADA
CPC classification number: H05K3/4697 , H01L2224/16225 , H01L2924/19105 , H05K1/141 , H05K1/145 , H05K1/182 , H05K1/186 , H05K3/284 , H05K3/4629 , H05K2201/049 , H05K2203/1316 , Y10T29/49126
Abstract: In a method of manufacturing a module board, an electronic component is mounted on a first principal surface of a small board. A cavity defining a through hole is formed in a core board. The electronic component is housed in the cavity by mounting the small board on a surface electrode arranged around the cavity. Resin layers are formed on both principal surfaces of the core board, and resin flows through a gap between the core board and the small board. Hence, the inside of the cavity is filled with the resin, and the electronic component is sealed with the resin.
Abstract translation: 在制造模块板的方法中，电子部件安装在小板的第一主表面上。 在芯板中形成限定通孔的空腔。 通过将小板安装在布置在腔体周围的表面电极上，将电子部件容纳在腔中。 树脂层形成在芯板的两个主表面上，并且树脂流过芯板和小板之间的间隙。 因此，空腔的内部填充有树脂，电子部件用树脂密封。
-
公开(公告)号：US20230371183A1
公开(公告)日：2023-11-16
申请号：US18359227
申请日：2023-07-26
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yoshiki TOBITA , Issei YAMAMOTO
Abstract: A wiring board includes at least one insulating layer, plurality of conductive members, at least one land electrode formed at position overlapping first surface in plan view of insulating layer as viewed from first surface side, land electrode being connected to each of at least one conductive member, and coil conductor provided inside insulating layer or on second surface on back side of first surface in insulating layer and having winding axis intersecting first surface. Plurality of conductive members includes first conductive member at position where at least part of the first conductive member overlaps opening of the coil conductor in plan view seen from first surface side, and second conductive member at position deviated from opening of coil conductor in plan view seen from first surface side. Area of first conductive member is smaller than area of second conductive member in plan view seen from first surface side.
-
公开(公告)号：US20200350667A1
公开(公告)日：2020-11-05
申请号：US16931817
申请日：2020-07-17
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yoshitaka ECHIKAWA , Issei YAMAMOTO , Ikuo DEGUCHI
Abstract: A substrate equipped with an antenna of the present disclosure includes a circuit substrate and an antenna element. When viewed from a thickness direction, an area of one principal surface of the circuit substrate is larger than that of another principal surface thereof, and each of the one principal surface and the other principal surface of the circuit substrate is formed in a rectangular shape. When a maximum width between a first outer periphery of the other principal surface projected onto the one principal surface and a first outer periphery of the one principal surface is defined as W1, the antenna element is mounted in at least part of a region on the one principal surface of the circuit substrate, in which the region has the width W1 from the second outer periphery of the other principal surface projected onto the one principal surface toward the inner side.
-
Patent Agency Ranking
16.发明申请公开(公告)号：US20200082990A1
公开(公告)日：2020-03-12
申请号：US16683857
申请日：2019-11-14
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Issei YAMAMOTO , Kunihiro MIYAHARA , Yoshihito OTSUBO
Abstract: Provided is a stacked electronic component having: a stacked body 1 in which ceramic layers 1a to 1h are stacked, the stacked body having an a upper surface U and side surfaces S; at least one recess portion 8 formed on the upper surface U that indicates at least one of a mark, a letter, or a number; electrodes 3, 4, 5, 6 formed between the layers of the stacked body 1; and a shield layer 9 formed on the upper surface U and the side surfaces S of the stacked body 1. Right below an inner bottom surface of the recess portion 8 of the stacked body 1, there is provided a no-electrode region NE in which the electrodes 3, 4, 5, 6 are not formed, the no-electrode region NE having a thickness which is equal to or larger than a depth of the recess portion 8.
-
公开(公告)号：US20190289737A1
公开(公告)日：2019-09-19
申请号：US16428162
申请日：2019-05-31
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Issei YAMAMOTO
Abstract: An electronic module includes a substrate having a first main surface and a second main surface, first electronic components on the first main surface, second electronic components on the second main surface, a first sealing resin portion, and a second sealing resin portion. Through holes are formed so as to extend through the substrate and the first sealing resin portion. A third electronic component is placed in the through holes. An area between the through holes and the third electronic component is filled with the second sealing resin portion, and the second sealing resin portion is formed to be exposed at a surface of the first sealing resin portion. When viewed in a direction perpendicular to the first main surface, the second sealing resin portion surrounds the third electronic component. The first sealing resin portion and the second sealing resin portion are made of different types of resins.
-
公开(公告)号：US20190208622A1
公开(公告)日：2019-07-04
申请号：US16265047
申请日：2019-02-01
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Yosuke MATSUSHITA , Issei YAMAMOTO , Shigeru ENDO , Yoshihito OTSUBO
IPC: H05K1/02 , H05K1/11 , H01G4/232 , H01F27/28 , H01G4/012 , H01G4/30 , H05K1/03 , H01P3/08 , H05K3/46 , H01F41/04
CPC classification number: H05K1/0237 , H01F17/00 , H01F27/2804 , H01F41/043 , H01F2027/2809 , H01G4/012 , H01G4/232 , H01G4/248 , H01G4/30 , H01P3/081 , H05K1/02 , H05K1/0306 , H05K1/115 , H05K3/46 , H05K3/4644 , H05K2201/10015 , H05K2201/10522 , H05K2201/10734
Abstract: A ceramic electronic component according to the present disclosure includes a ceramic insulator and conductor portions including inner conductors disposed inside the ceramic insulator and outer conductors disposed outside the ceramic insulator, wherein each conductor portion has a surface and a back surface opposite to the surface, and at least one of the conductor portions includes a flat portion in which the conductor thickness is constant, surface corner portions having a round-chamfered shape in the direction from the surface toward the back surface of the inner conductor or the outer conductor, and back surface corner portions having a round-chamfered shape in the direction from the back surface toward the surface of the inner conductor or the outer conductor.
-
公开(公告)号：US20170250061A1
公开(公告)日：2017-08-31
申请号：US15427721
申请日：2017-02-08
Applicant: MURATA MANUFACTURING CO., LTD.
Inventor： Issei YAMAMOTO , Atsushi SHIMIZU , Yoichi TAKAGI , Hideo NAKAGOSHI , Toru KOMATSU , Hideki SHINKAI , Tetsuya ODA
Abstract: A vacuum device includes a processing target placement unit that is arranged inside a vacuum chamber and a vacuum evacuation unit that is connected to the vacuum chamber. The processing target placement unit has one main surface on which processing targets are placed and a side surface that is connected to the one main surface. The processing target placement unit is provided with a plurality of grooves that have openings at the one main surface. When the processing target placement unit is viewed from the one main surface side thereof, the smallest width of the opening of each groove in the one main surface is equal to or less than half the smallest width of the processing target.
-
公开(公告)号：US20210259104A1
公开(公告)日：2021-08-19
申请号：US17308250
申请日：2021-05-05
Applicant: Murata Manufacturing Co., Ltd.
Inventor： Naoya MURAKITA , Yoshihito OTSUBO , Issei YAMAMOTO , Yuta MORIMOTO
Abstract: A ceramic electronic component of the present disclosure includes a component body including a ceramic layer, at least one terminal electrode provided on one main surface of the component body, and an insulating covering layer provided across the ceramic layer and the terminal electrode to cover part, instead of an entire circumference, of a peripheral edge portion of the terminal electrode, wherein when viewed in plan view from one main surface of the component body, the covering layer intersects with the terminal electrode at a non-perpendicular angle at an intersection of the covering layer and the terminal electrode not covered with the covering layer.
-
-
-
-
-
-
-
-
-
Search Results
27
records
(took 0.016 seconds)
