公开(公告)号：US12131798B2

公开(公告)日：2024-10-29

申请号：US17972300

申请日：2022-10-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junyoung Ko ,  Sangwan Nam ,  Youse Kim ,  Heewon Kim

IPC: G11C7/10 ,  G06F11/10

CPC classification number: G11C7/1057 ,  G06F11/1076

Abstract: Provided is a non-volatile memory device. The non-volatile memory device includes: a memory cell array including cell strings, each including memory cells respectively connected to word lines; a page buffer circuit including page buffers respectively connected to the memory cells through bit lines, wherein a first page buffer is connected to a first cell string through a first bit line; a control logic circuit configured to control a pre-sensing operation to disconnect the first bit line and the first cell string from each other during a pre-sensing period for detecting a defect of the first bit line and control a post-sensing operation to connect the first bit line and the first cell string to each other in a post-sensing period for detecting defects of the word lines and the first bit line; and a defect detection circuit configured to detect defects of the word lines based the sensing operations.

公开(公告)号：US12119331B2

公开(公告)日：2024-10-15

申请号：US17677453

申请日：2022-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ju-Il Choi ,  Gyuho Kang ,  Heewon Kim ,  Sechul Park ,  Jongho Park ,  Junyoung Park

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/48 ,  H01L23/538 ,  H01L25/10 ,  H01L25/065

CPC classification number: H01L25/105 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5386 ,  H01L24/08 ,  H01L24/32 ,  H01L23/49833 ,  H01L24/80 ,  H01L25/0657 ,  H01L2224/08237 ,  H01L2224/32225 ,  H01L2224/80895 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/1431 ,  H01L2924/1434

Abstract: Disclosed is a semiconductor package comprising an interposer substrate having first and second surfaces opposite each other and including a wiring layer adjacent to the first surface, a semiconductor chip on the first surface of the interposer substrate, a passivation layer on the first surface of the interposer substrate and covering the semiconductor chip, and redistribution patterns in the passivation layer and connected to the semiconductor chip. The semiconductor chip has third and fourth surfaces opposite to each other. The third surface of the semiconductor chip faces the first surface of the interposer substrate. The redistribution patterns are connected to the fourth surface of the semiconductor chip. The semiconductor chip includes chip pads adjacent to the third surface and chip through electrodes connected to the chip pads. Each of the chip pads is directly bonded to a corresponding one of wiring patterns in the wiring layer.

公开(公告)号：US12027482B2

公开(公告)日：2024-07-02

申请号：US17568355

申请日：2022-01-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeonggi Jin ,  Gyuho Kang ,  Unbyoung Kang ,  Heewon Kim ,  Jumyong Park ,  Hyunsu Hwang

IPC: H01L23/00 ,  H01L23/48 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L24/08 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/53238 ,  H01L24/05 ,  H01L2224/02251 ,  H01L2224/05009 ,  H01L2224/05555 ,  H01L2224/05647 ,  H01L2224/08146

Abstract: A semiconductor chip includes: a semiconductor substrate; a pad insulating layer on the semiconductor substrate; a through electrode which penetrates the semiconductor substrate and the pad insulating layer and includes a conductive plug and a conductive barrier layer surrounding a sidewall of the conductive plug; and a bonding pad which surrounds a sidewall of the through electrode and is spaced apart from the conductive plug with the conductive barrier layer disposed therebetween.

公开(公告)号：US11749005B2

公开(公告)日：2023-09-05

申请号：US17948450

申请日：2022-09-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heewon Kim ,  Seon Min Rhee ,  Jihye Kim ,  Ju Hwan Song ,  Jaejoon Han

IPC: G06V20/64 ,  G06T7/50 ,  G06F21/32 ,  G06N3/08 ,  G06V40/16 ,  G06F18/22 ,  G06F18/214 ,  G06F18/2413 ,  G06V10/74 ,  G06V10/44 ,  G06V10/75

CPC classification number: G06V20/647 ,  G06F18/214 ,  G06F18/22 ,  G06F18/2413 ,  G06F21/32 ,  G06N3/08 ,  G06T7/50 ,  G06V10/454 ,  G06V10/751 ,  G06V10/761 ,  G06V40/165 ,  G06V40/168 ,  G06V40/172 ,  G06T2207/10028 ,  G06T2207/20081 ,  G06T2207/20084 ,  G06T2207/30201

Abstract: A user authentication method and a user authentication apparatus acquire an input image including a frontalized face of a user, calculate a confidence map including confidence values, for authenticating the user, corresponding to pixels with values maintained in a depth image of the frontalized face of the user among pixels included in the input image, extract a second feature vector from a second image generated based on the input image and the confidence map, acquire a first feature vector corresponding to an enrolled image, and perform authentication of the user based on a correlation between the first feature vector and the second feature vector.

公开(公告)号：US11482042B2

公开(公告)日：2022-10-25

申请号：US16875368

申请日：2020-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heewon Kim ,  Seon Min Rhee ,  Jihye Kim ,  Ju Hwan Song ,  Jaejoon Han

IPC: G06V40/16 ,  G06T7/50 ,  G06F21/32 ,  G06K9/62 ,  G06N3/08 ,  G06V10/75

Abstract: A user authentication method and a user authentication apparatus acquire an input image including a frontalized face of a user, calculate a confidence map including confidence values, for authenticating the user, corresponding to pixels with values maintained in a depth image of the frontalized face of the user among pixels included in the input image, extract a second feature vector from a second image generated based on the input image and the confidence map, acquire a first feature vector corresponding to an enrolled image, and perform authentication of the user based on a correlation between the first feature vector and the second feature vector.