公开(公告)号：US20240234292A1

公开(公告)日：2024-07-11

申请号：US18150634

申请日：2023-01-05

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： YongMoo Shin ,  HeeSoo Lee ,  EunHee Myung

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/10 ,  H01L25/16

CPC classification number: H01L23/49877 ,  H01L21/4853 ,  H01L21/4867 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/49838 ,  H01L25/105 ,  H01L25/162 ,  H01L25/165 ,  H01L24/16

Abstract: A semiconductor device includes a first substrate and a second substrate. A graphene-coated interconnect is disposed between the first substrate and second substrate. A semiconductor die is disposed between the first substrate and second substrate. The first substrate is electrically coupled to the second substrate through the graphene-coated interconnect. An encapsulant is deposited between the first substrate and second substrate.

公开(公告)号：US20240194629A1

公开(公告)日：2024-06-13

申请号：US18351369

申请日：2023-07-12

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： YongMoo Shin ,  HeeSoo Lee ,  SuJeong Kwon

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/16 ,  H01L33/62 ,  H01L33/64

CPC classification number: H01L24/29 ,  H01L24/27 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L25/0652 ,  H01L25/16 ,  H01L33/62 ,  H01L33/641 ,  H01L33/644 ,  H01L24/05 ,  H01L24/33 ,  H01L24/97 ,  H01L2224/05573 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/2731 ,  H01L2224/29082 ,  H01L2224/29139 ,  H01L2224/29147 ,  H01L2224/29166 ,  H01L2224/29209 ,  H01L2224/29211 ,  H01L2224/29216 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29324 ,  H01L2224/29338 ,  H01L2224/29347 ,  H01L2224/29355 ,  H01L2224/29386 ,  H01L2224/29493 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/83224 ,  H01L2224/8384 ,  H01L2224/858 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/014 ,  H01L2924/05432 ,  H01L2924/0549 ,  H01L2924/0635 ,  H01L2924/0665 ,  H01L2924/0675 ,  H01L2924/12041

Abstract: A semiconductor device has a substrate with a die pad. A conductive material is disposed on the die pad. The conductive material includes a plurality of graphene-coated metal balls in a matrix. A semiconductor die is disposed on the conductive material. The conductive material is sintered using an infrared laser. A bond wire is formed between the semiconductor die and substrate. An encapsulant is deposited over the semiconductor die and bond wire.

公开(公告)号：US20240128200A1

公开(公告)日：2024-04-18

申请号：US18046028

申请日：2022-10-12

Applicant: STATS ChipPAC Pte. Ltd.

Inventor： YongMoo Shin ,  SuJeong Kwon

IPC: H01L23/552 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L21/56 ,  H01L23/3128 ,  H01L23/5383

Abstract: A semiconductor device has a substrate and an electrical component disposed over the substrate. An encapsulant is deposited over the electrical component and substrate. A shielding layer has a graphene core shell formed on a surface of the encapsulant. The shielding layer can be printed on the encapsulant. The graphene core shell includes a copper core. The shielding layer has a plurality of cores covered by graphene and the graphene is interconnected within the shielding layer to form an electrical path. The shielding layer also has thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the matrix. A shielding material can be disposed around the electrical component. The electrical path dissipates any charge incident on shielding layer, such as an ESD event, to reduce or inhibit the effects of EMI, RFI, and other inter-device interference.