公开(公告)号：US20160218707A1

公开(公告)日：2016-07-28

申请号：US15006000

申请日：2016-01-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Junhyun Park ,  Jonghee Kim ,  Sunghwan Kim ,  Jaekeun Lim ,  Chongchul Chai

IPC: H03K17/687 ,  G09G3/36

Abstract: A gate driving circuit includes a plurality of driving stages, wherein an ith (where i is a natural number of 2 or more) driving stage among the plurality of driving stages includes: a output unit outputting an ith output signal including a high voltage generated based on a clock signal in response to a low voltage at a Q-node; a stabilization unit providing the low voltage to the Q-node in response to a switching signal applied to an A-node after the ith output signal is outputted; and an inverter unit outputting the switching signal for controlling the stabilization unit to the A-node.

Abstract translation: 栅极驱动电路包括多个驱动级，其中，所述多个驱动级中的第i个（其中i是2或更多的自然数）驱动级包括：输出单元，输出包括基于高电压的基于 响应于Q节点处的低电压的时钟信号; 稳定单元，响应于在输出第i个输出信号之后施加到A节点的切换信号，向Q节点提供低电压; 以及逆变器单元，输出用于将稳定单元控制到A节点的切换信号。

公开(公告)号：US09035926B2

公开(公告)日：2015-05-19

申请号：US13764926

申请日：2013-02-12

Applicant: Samsung Display Co., Ltd.

Inventor： Se Hyoung Cho ,  Sunhwa Lee ,  Meehye Jung ,  Yeun Tae Kim ,  Sunghwan Won ,  Chongchul Chai

IPC: G06F3/038 ,  G09G5/00 ,  G09G3/36 ,  G02F1/1333 ,  G02F1/1339 ,  G02F1/1362

CPC classification number: G09G3/36 ,  G02F1/133377 ,  G02F1/1339 ,  G02F1/136204 ,  G02F1/136209 ,  G02F2001/133388 ,  G02F2001/136222 ,  G09G3/3648 ,  G09G3/3677

Abstract: A nano crystal display includes a display panel including a display area and a non-display area, a data driver which applies data voltages to pixels through data lines, a gate driver disposed in the non-display area and which sequentially applies gate signals to the pixels through gate lines in response to control signals, a control signal line part disposed in the non-display area and which applies the control signals to the gate driver, a cover layer which extends in a column direction and covers the gate driver and the control signal line part, and a sub-electrode which extends in the column direction and covers the cover layer. The pixels display gray scales corresponding to the data voltages provided through the data lines in response to the gate signals.

Abstract translation: 纳米晶体显示器包括显示区域和非显示区域的显示面板，通过数据线向像素施加数据电压的数据驱动器，设置在非显示区域中的栅极驱动器，并且将栅极信号依次施加到 响应于控制信号通过栅极线的像素;控制信号线部分，设置在非显示区域中，并且将控制信号施加到栅极驱动器;覆盖层，其在列方向上延伸并覆盖栅极驱动器和控制 信号线部分和沿列方向延伸并覆盖覆盖层的子电极。 像素显示对应于响应于门信号通过数据线提供的数据电压的灰度级。

公开(公告)号：US20210312855A1

公开(公告)日：2021-10-07

申请号：US17078378

申请日：2020-10-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Minjae Jeong ,  Joonho Lee ,  Keechan Park ,  Kyunghoon Chung ,  Chongchul Chai

IPC: G09G3/32

Abstract: A display panel, a pixel circuit, and a display device are disclosed. The display panel includes sub-pixels and a driver driving the sub-pixels. Each sub-pixel includes: an emission element; a first transistor configured to generate a driving current; a constant current control circuit configured to receive a reference voltage and a bias voltage for setting a value of the driving current and including a first capacitor configured to store a first compensation voltage generated by adding a threshold voltage of the first transistor to a difference between the bias voltage and the reference voltage; and a pulse width control circuit configured to receive a data voltage used to determine an emission duration of the emission element and including a second transistor configured to control a pulse width of the driving current according to the data voltage and a second capacitor configured to store a second compensation voltage corresponding to a threshold voltage of the second transistor.

公开(公告)号：US10996520B2

公开(公告)日：2021-05-04

申请号：US15442529

申请日：2017-02-24

Applicant: Samsung Display Co., Ltd

Inventor： Bonyong Koo ,  Chongchul Chai ,  Yujin Lee ,  Yongkoo Her

IPC: G02F1/1343 ,  G02F1/1333 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1335

Abstract: A display device includes: a first substrate and a second substrate including a plurality of pixel areas and opposing each other; a liquid crystal layer between the first substrate and the second substrate; a first pixel electrode on the first substrate; a first insulating layer on the first pixel electrode; and a second pixel electrode on the first insulating layer and in a different pixel area from a pixel area in which the first pixel electrode is disposed.

公开(公告)号：US10733941B2

公开(公告)日：2020-08-04

申请号：US16166475

申请日：2018-10-22

Applicant: Samsung Display Co., Ltd. ,  Industry-University Cooperation Foundation Hanyang University

Inventor： Chongchul Chai ,  Ansu Lee ,  Boyong Chung ,  Oh-Kyong Kwon ,  Nack-Hyeon Keum

IPC: G09G3/3291 ,  G09G3/3233 ,  H01L27/32 ,  G09G3/3258 ,  G09G3/3266

Abstract: A pixel includes a first transistor connected between a line supplying a power supply voltage and a second node, and providing a driving current corresponding to a data voltage to a light emitting element based on a voltage of a first node, a third transistor connected between the first node and a line supplying a reference voltage, and generating a sampling current based on a difference between a voltage of the second node and the reference voltage, a second transistor connected between the line supplying the power supply voltage and the first node, adjusting the voltage of the first node to generate the sampling current based on a voltage of a third node, a fourth transistor transferring the power supply voltage to the third node, a fifth transistor transferring the data voltage to the second node, and a capacitor connected between the first node and the third node.

公开(公告)号：US10192889B2

公开(公告)日：2019-01-29

申请号：US15053483

申请日：2016-02-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jisun Kim ,  Chongchul Chai

IPC: G02F1/1333 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66 ,  G02F1/1362 ,  G02F1/1343

Abstract: A display device includes a first substrate including a display area and a non-display area. A gate line and a gate electrode are in the display area. A data line is connected to the gate line. A gate insulating layer is on the gate line and the gate electrode. A semiconductor layer is on the gate insulating layer. A drain electrode and a source electrode are on the semiconductor layer. A first passivation layer is on the drain electrode and the source electrode. A color filter is on the first passivation layer. A common electrode is on the first passivation layer. A second passivation layer is on the common electrode. A pixel electrode is on the second passivation layer. The gate insulating layer has substantially a same shape as a shape of the gate electrode. The gate insulating layer has a width wider than a width of the gate electrode.

公开(公告)号：US10186198B2

公开(公告)日：2019-01-22

申请号：US14834015

申请日：2015-08-24

Applicant: Samsung Display Co., Ltd.

Inventor： Jonghee Kim ,  Youngwan Seo ,  Jaekeun Lim ,  Chongchul Chai

IPC: G09G3/32 ,  G09G3/3258 ,  G09G3/3291 ,  G09G3/36

Abstract: A gate driving circuit includes a first driving stage driving a first gate line included in a display panel. The first driving stage includes a first output transistor outputting a first carry signal on the basis of a first clock signal in response to a voltage of a first node, a second output transistor outputting a first gate signal on the basis of the first clock signal in response to the voltage of the first node, a first control transistor applying a second clock signal to a second node, a second control transistor applying a start signal to the first node in response to a voltage of the second node, and a third control transistor applying a first discharge voltage to the first node in response to the first carry signal.

公开(公告)号：US20170047030A1

公开(公告)日：2017-02-16

申请号：US15091072

申请日：2016-04-05

Applicant: Samsung Display Co., Ltd.

Inventor： Jonghee KIM ,  Jisun Kim ,  Youngwan Seo ,  Jaekeun Lim ,  Chongchul Chai

IPC: G09G3/36

Abstract: A display device including: a display panel including a gate line and a data line; and a shift register including a stage for driving the gate line. The stage may include a first driving unit in a display area of the display panel and a second driving unit in a non-display area of the display panel.

Abstract translation: 一种显示装置，包括：显示面板，包括栅极线和数据线; 以及包括用于驱动栅极线的级的移位寄存器。 舞台可以包括显示面板的显示区域中的第一驱动单元和显示面板的非显示区域中的第二驱动单元。

公开(公告)号：US20160300852A1

公开(公告)日：2016-10-13

申请号：US14927269

申请日：2015-10-29

Applicant: Samsung Display Co., Ltd.

Inventor： Junhyun Park ,  Sunghwan Kim ,  Kyoungju Shin ,  Chongchul Chai

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/124 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

Abstract: Provided is a method of manufacturing TFT substrate, the method including: forming a first conductive layer and a gate electrode; forming a gate insulating layer covering the first conductive layer and the gate electrode; forming a first contact hole exposing the first conductive layer through the gate insulating layer; forming, on the gate insulating layer of a pixel area, an oxide semiconductor pattern comprising a first region which is conductive, a second region which is conductive, and a third region between the first region and the second region; forming a source electrode contacting the first region of the oxide semiconductor pattern, a drain electrode contacting the second region of the oxide semiconductor pattern and a second conductive layer contacting the first conductive layer on a non-pixel area. Each of the first region and the second region overlaps the gate electrode.

Abstract translation: 提供一种制造TFT基板的方法，该方法包括：形成第一导电层和栅电极; 形成覆盖所述第一导电层和所述栅电极的栅极绝缘层; 形成通过所述栅极绝缘层暴露所述第一导电层的第一接触孔; 在像素区域的栅极绝缘层上形成氧化物半导体图案，该氧化物半导体图案包括导电的第一区域，导电的第二区域和位于第一区域与第二区域之间的第三区域; 形成与氧化物半导体图案的第一区域接触的源电极，与氧化物半导体图案的第二区域接触的漏电极和在非像素区域上接触第一导电层的第二导电层。 第一区域和第二区域中的每一个与栅电极重叠。

公开(公告)号：US20230335063A1

公开(公告)日：2023-10-19

申请号：US18211322

申请日：2023-06-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Gyungsoon PARK ,  Gunhee Kim ,  Hyeongseok Kim ,  Youngwan Seo ,  Chongchul Chai

IPC: G09G3/3275 ,  G09G3/20 ,  H10K59/124 ,  H10K59/131 ,  H10K59/35

CPC classification number: G09G3/3275 ,  G09G3/2003 ,  H10K59/124 ,  H10K59/131 ,  H10K59/353 ,  G09G2300/0452 ,  G09G2300/0426

Abstract: A display panel includes a 1-1st sub-pixel and a 1-2nd sub-pixel disposed in a first row, a 2-1st sub-pixel disposed in a second row and a 3-1st sub-pixel and a 3-2nd sub-pixel disposed in a third row. A first data line extends from the first row to the third row and electrically connects a pixel circuit of the 1-1st sub-pixel, a pixel circuit of the 2-1st sub-pixel, and a pixel circuit of the 3-1st sub-pixel. A 2-1st data line is electrically connected to a pixel circuit of the 1-2nd sub-pixel. A 2-2nd data line is electrically connected to a pixel circuit of the 3-2nd sub-pixel. A first bridge line is disposed on a different layer than the data lines and contacts the 2-1st data line and the 2-2nd data line and includes an overlapping portion extending along at least a portion of the first data line.