公开(公告)号：US20190312147A1

公开(公告)日：2019-10-10

申请号：US16231781

申请日：2018-12-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su Lee ,  Yoon Ho Khang ,  Dong Jo Kim ,  Hyun Jae Na ,  Sang Ho Park ,  Se Hwan Yu ,  Chong Sup Chang ,  Dae Ho Kim ,  Jae Neung Kim ,  Myoung Geun Cha ,  Sang Gab Kim ,  Yu-Gwang Jeong

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US09263467B2

公开(公告)日：2016-02-16

申请号：US14466665

申请日：2014-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sang Ho Park ,  Yoon Ho Khang ,  Se Hwan Yu ,  Yong Su Lee ,  Chong Sup Chang ,  Myoung Geun Cha ,  Hyun Jae Na

IPC: H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L29/786 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L29/41758 ,  H01L29/458 ,  H01L29/78642 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.

Abstract translation: 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。

公开(公告)号：US20140183522A1

公开(公告)日：2014-07-03

申请号：US14063774

申请日：2013-10-25

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Yong Su Lee ,  Yoon Ho Khang ,  Hyun Jae Na ,  Se Hwan Yu ,  Jong Chan Lee ,  Dong Hwan Shim

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/7869

Abstract: A thin film transistor array panel including a substrate; a channel region disposed on the substrate and including oxide semiconductor disposed on the substrate; a source electrode and a drain electrode connected to the oxide semiconductor and facing each other at both sides, centered on the oxide semiconductor; an insulating layer disposed on the oxide semiconductor; and a gate electrode disposed on the insulating layer. The drain electrode includes a first drain region and a second drain region; the charge mobility of the first drain region is greater than that of the second drain region, the source electrode includes a first source region and a second source region, and the charge mobility of the first source region is greater than that of the second source region.

Abstract translation: 一种薄膜晶体管阵列面板，包括基板; 设置在所述基板上并且包括设置在所述基板上的氧化物半导体的沟道区; 连接到所述氧化物半导体并且以所述氧化物半导体为中心的两侧面对的源电极和漏电极; 设置在所述氧化物半导体上的绝缘层; 以及设置在所述绝缘层上的栅电极。 漏极包括第一漏区和第二漏区; 第一漏极区域的电荷迁移率大于第二漏极区域的电荷迁移率，源电极包括第一源极区域和第二源极区域，并且第一源极区域的电荷迁移率大于第二源极区域的电荷迁移率 。

公开(公告)号：US12075655B2

公开(公告)日：2024-08-27

申请号：US17151883

申请日：2021-01-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Sang Sub Kim ,  Ji Yeong Shin ,  Yong Su Lee ,  Ki Seok Choi

IPC: H01L27/12 ,  H10K59/121 ,  H10K59/123 ,  H10K59/124

CPC classification number: H10K59/1213 ,  H10K59/1216 ,  H10K59/123 ,  H10K59/124

Abstract: An organic light emitting diode display includes a first thin film transistor of which a channel is formed in a polycrystalline transistor, a second thin film transistor of which a channel is formed in an oxide semiconductor layer, an organic light emitting diode electrically connected to the first thin film transistor, a storage capacitor having a first electrode and a second electrode, wherein the second electrode of the storage capacitor is electrically connected to a gate electrode of the first thin film transistor, and an overlapping layer overlapping the oxide semiconductor layer in a plan view and receiving a positive voltage. The oxide semiconductor layer is positioned higher than the gate electrode of the first thin film transistor and the second electrode of the storage capacitor.

公开(公告)号：US11616108B2

公开(公告)日：2023-03-28

申请号：US16661329

申请日：2019-10-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joon Woo Bae ,  Mee Jae Kang ,  Thanh Tien Nguyen ,  Kyoung Won Lee ,  Yong Su Lee ,  Jae Seob Lee ,  Gyoo Chul Jo ,  Myoung Geun Cha

IPC: H01L27/32

Abstract: An organic light emitting diode display includes a substrate, an overlap layer on the substrate, a semiconductor layer on the overlap layer, a first gate conductor on the semiconductor layer, a second gate conductor on the first gate conductor, a data conductor on the second gate conductor, a driving transistor on the overlap layer, and an organic light emitting diode connected with the driving transistor. The driving transistor includes, in the semiconductor layer, a first electrode, a second electrode, with a channel therebetween. A gate electrode of the first gate conductor overlaps the channel. The overlap layer overlaps the channel of the driving transistor and at least a portion of the first electrode. A storage line of the second gate conductor receives a driving voltage through a driving voltage line in the data conductor. The overlap layer receives a constant voltage.

公开(公告)号：US11410602B2

公开(公告)日：2022-08-09

申请号：US17092832

申请日：2020-11-09

Applicant: Samsung Display Co., LTD.

Inventor： Keun Woo Kim ,  Hye Na Kwak ,  Doo Na Kim ,  Han Bit Kim ,  Yong Su Lee

IPC: G09G3/3233 ,  G09G3/20 ,  G09G3/3275 ,  G09G3/3266

Abstract: A display device includes a driving circuit that drives a pixel, and a display region including the pixel. The pixel includes a light emitting element electrically connected between a first power source and a second power source, a first transistor electrically connected between the first power source and the light emitting element to control a driving current, the first transistor including a first gate electrode electrically connected to a first node, and a second gate electrode electrically connected to a bias control line, and a switching transistor electrically connected between a data line and the first node, the switching transistor including a gate electrode electrically connected to a scan line. The driving circuit varies a control signal provided to the bias control line in a second period based on a first data signal provided to the data line during a first period.

公开(公告)号：US11380746B2

公开(公告)日：2022-07-05

申请号：US17208571

申请日：2021-03-22

Applicant: Samsung Display Co., Ltd.

Inventor： Seong Min Wang ,  Young-In Hwang ,  Yong Ho Yang ,  Yong Su Lee ,  Jae Seob Lee ,  Gyoo Chul Jo

IPC: H01L27/32 ,  H01L51/52 ,  G09G3/3233 ,  G09G3/3258 ,  H01L51/00

Abstract: A display may include flexible substrate, a blocking layer on the flexible substrate, a pixel on the flexible substrate and the blocking layer, and a scan line, a data line, a driving voltage line, and an initialization voltage line connected to the pixel. The pixel may include an organic light emitting diode, a switching transistor connected to the scan line, and a driving transistor to apply a current to the organic light emitting diode. The blocking layer is in an area that overlaps the switching transistor on a plane, and between the switching transistor and the flexible substrate, and receives a voltage through a contact hole that exposes the blocking layer.

公开(公告)号：US10930725B2

公开(公告)日：2021-02-23

申请号：US16575643

申请日：2019-09-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Sang Sub Kim ,  Ji Yeong Shin ,  Yong Su Lee ,  Ki Seok Choi

IPC: H01L27/32

Abstract: An organic light emitting diode display includes a first thin film transistor of which a channel is formed in a polycrystalline transistor, a second thin film transistor of which a channel is formed in an oxide semiconductor layer, an organic light emitting diode electrically connected to the first thin film transistor, a storage capacitor having a first electrode and a second electrode, wherein the second electrode of the storage capacitor is electrically connected to a gate electrode of the first thin film transistor, and an overlapping layer overlapping the oxide semiconductor layer in a plan view and receiving a positive voltage. The oxide semiconductor layer is positioned higher than the gate electrode of the first thin film transistor and the second electrode of the storage capacitor.

公开(公告)号：US10826026B2

公开(公告)日：2020-11-03

申请号：US16203784

申请日：2018-11-29

Applicant: Samsung Display Co., Ltd.

Inventor： Myoung Geun Cha ,  Sang Gun Choi ,  Joon Woo Bae ,  Ji Yeong Shin ,  Yong Su Lee

IPC: H01L51/56 ,  H01L27/32 ,  H01L21/308 ,  H01L51/52

Abstract: A method for manufacturing a display device including forming a lower electrode on a substrate; depositing a first insulation layer thereon; forming a semiconductor layer that overlaps the lower electrode thereon; depositing a second insulation layer thereon; forming a gate electrode and an etching prevention layer that overlap the semiconductor layer thereon; depositing a third insulation layer thereon; forming a first conductor that overlaps the gate electrode thereon; depositing a fourth insulation layer thereon; forming a photosensitive film patterns thereon by depositing a photosensitive film and exposing and developing the photosensitive film such that portions of the photosensitive film are removed in a first area, a second area, and a third area; etching the third insulation layer using the patterns as an etching mask; etching the etching prevention layer by using the patterns as an etching mask; and etching the first insulation layer using the patterns as an etching mask.

公开(公告)号：US10734526B2

公开(公告)日：2020-08-04

申请号：US15729120

申请日：2017-10-10

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Chan Lee ,  Kyoung Won Lee ,  Woong Hee Jeong ,  Yong Su Lee

IPC: H01L29/786 ,  H01L29/49 ,  H01L21/225 ,  H01L21/265 ,  H01L21/266 ,  H01L29/423 ,  H01L29/66 ,  G02F1/1333 ,  H01L27/32 ,  G02F1/1368 ,  H01L27/12

Abstract: A display device includes: a flexible substrate; a semiconductor layer on the flexible substrate; a passivation layer on the semiconductor layer; an alignment member layer on the passivation, the alignment member layer including a first alignment member and a second alignment member in a same layer; a first insulation layer on the alignment member layer and the passivation layer; a gate electrode on the first insulation layer; a second insulation layer on the first insulation layer and the gate electrode; and a source electrode and a drain electrode on the second insulation layer and spaced apart from each other, wherein the first alignment member and the second alignment member are spaced apart from each other with the gate electrode therebetween.