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公开(公告)号：US11721684B2
公开(公告)日：2023-08-08
申请号：US17245299
申请日：2021-04-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kohji Kanamori , Hyun Mog Park , Yong Seok Kim , Kyung Hwan Lee , Jun Hee Lim , Jee Hoon Han
CPC classification number: H01L25/18 , H01L24/05 , H01L24/08 , H01L24/09 , H10B41/27 , H10B43/27 , H01L2224/022 , H01L2224/05025 , H01L2224/08145 , H01L2224/0903 , H01L2224/09181 , H01L2924/14511
Abstract: A semiconductor device includes a first semiconductor structure including circuit devices and first bonding pads; and a second semiconductor structure connected to the first semiconductor structure, the second semiconductor structure including a base layer; a first memory cell structure including first gate electrodes and first channels penetrating through the first gate electrodes; a second memory cell structure including second gate electrodes and second channels penetrating through the second gate electrodes; bit lines between the first and the second memory cell structures, and electrically connected to the first and second channels in common; first and second conductive layers on the second surface of the base layer; a pad insulating layer having an opening exposing a portion of the second conductive layer; and second bonding pads disposed to correspond to the first bonding pads in a lower portion of the second memory cell structure.
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公开(公告)号：US11239249B2
公开(公告)日：2022-02-01
申请号：US16533193
申请日：2019-08-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyung Hwan Lee , Yong Seok Kim , Jun Hee Lim , Kohji Kanamori
IPC: H01L27/11556 , H01L27/11582 , H01L27/11526 , H01L25/18 , H01L27/11573 , H01L21/02 , H01L21/311
Abstract: A vertical-type memory device includes: a first gate structure including first gate electrodes spaced apart from each other and stacked on a substrate; first channel structures penetrating through the first gate structure and being in contact with the substrate; a second gate structure including second gate electrodes spaced apart from each other and stacked on the first gate structure; and second channel structures penetrating through the second gate structure and being in contact with the first channel structures. The first channel structures each may include a first channel layer penetrating the first gate structure, and a first channel pad disposed on the first channel layer and including a first pad region including n-type impurities and a second pad region including p-type impurities.
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公开(公告)号：US11017202B2
公开(公告)日：2021-05-25
申请号：US16204809
申请日：2018-11-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun A Kim , Jeong Hoo Kim , Seung Geol Baek , Kyung Hoon Song , Kwang Sub Lee , Gyu Sang Cho , Yun Jang Jin , Yong Seok Kim , Valeriy Prushinskiy , Se Young Jang , Chang Ryong Heo , Suk Hyun , Young Il Shin , Hyeong Wook Yang , Tushar Balasaheb Sandhan
Abstract: An electronic device is provided. The electronic device includes a transparent member, a display positioned under a transparent member that includes a plurality of pixels, an image sensor positioned under some areas of the display, a memory, and a processor. The processor obtains a first image at least based on light output through at least some of the plurality of pixels and reflected by an external object coming into contact with the transparent member using the image sensor, performs authentication on the external object at least based on the at least one template using the first image, generates a second image of the external object at least based on the first image when quality of the first image corresponds to a given condition based on a result of the authentication, and performs authentication on the external object at least based on the at least one template using the second image.
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公开(公告)号：US09459041B2
公开(公告)日：2016-10-04
申请号：US14274166
申请日：2014-05-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Young Gwi Park , Joo Hee Song , Yong Seok Kim
CPC classification number: F25D29/005 , F25D23/00 , F25D23/028 , F25D29/00 , F25D2323/023 , F25D2400/06 , F25D2400/361
Abstract: Disclosed is a refrigerator including a main body provided with a storage chamber; a door to respectively open and close the storage chamber; a control unit installed the door to select an operation; a reception part provided in the door to receive the control unit; and an installation hole provided on a side end of the door to cause the control unit to be inserted into the reception part. The control unit is installed through the side end of the door, which is deviated from a user's line of sight.
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公开(公告)号：US08752919B2
公开(公告)日：2014-06-17
申请号：US13926371
申请日：2013-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Young Gwi Park , Joo Hee Song , Yong Seok Kim
IPC: A47B96/00
CPC classification number: F25D29/005 , F25D23/00 , F25D23/028 , F25D29/00 , F25D2323/023 , F25D2400/06 , F25D2400/361
Abstract: Disclosed is a refrigerator including a main body provided with a storage chamber; a door to respectively open and close the storage chamber; a control unit installed the door to select an operation; a reception part provided in the door to receive the control unit; and an installation hole provided on a side end of the door to cause the control unit to be inserted into the reception part. The control unit is installed through the side end of the door, which is deviated from a user's line of sight.
Abstract translation: 公开了一种冰箱，其包括设置有储存室的主体; 分别打开和关闭储藏室的门; 控制单元安装门以选择操作; 接收部，设置在所述门中以接收所述控制单元; 以及设置在门的侧端的安装孔，以使控制单元插入接收部。 控制单元通过门的侧端安装，其偏离用户的视线。
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Patent Agency Ranking
公开(公告)号：US20130285528A1
公开(公告)日：2013-10-31
申请号：US13926371
申请日：2013-06-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Young Gwi PARK , Joo Hee Song , Yong Seok Kim
CPC classification number: F25D29/005 , F25D23/00 , F25D23/028 , F25D29/00 , F25D2323/023 , F25D2400/06 , F25D2400/361
Abstract: Disclosed is a refrigerator including a main body provided with a storage chamber; a door to respectively open and close the storage chamber; a control unit installed the door to select an operation; a reception part provided in the door to receive the control unit; and an installation hole provided on a side end of the door to cause the control unit to be inserted into the reception part. The control unit is installed through the side end of the door, which is deviated from a user's line of sight.
Abstract translation: 公开了一种冰箱，其包括设置有储存室的主体; 分别打开和关闭储藏室的门; 控制单元安装门以选择操作; 接收部，设置在所述门中以接收所述控制单元; 以及设置在门的侧端的安装孔，以使控制单元插入接收部。 控制单元通过门的侧端安装，其偏离用户的视线。
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公开(公告)号：US12213322B2
公开(公告)日：2025-01-28
申请号：US17380331
申请日：2021-07-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung Hwan Lee , Kwang Seok Kim , Yong Seok Kim , Il Gweon Kim , Kil Ho Lee
Abstract: A three-dimensional semiconductor memory device is provided. The semiconductor memory device includes first horizontal conductive lines on a substrate in a first direction, each of the first horizontal conductive lines extending in a second direction different from the first direction, second horizontal conductive lines stacked on the substrate in the first direction, each of the second horizontal conductive lines extending in the second direction, a vertical conductive line between the first horizontal conductive line and the second horizontal conductive line and extending in the first direction, a plurality of first magnetic tunnel junction patterns between the vertical conductive line and each of the first horizontal conductive lines, and a plurality of second magnetic tunnel junction patterns between the vertical conductive lines and each of the second horizontal conductive lines. The first horizontal conductive lines and the second horizontal conductive lines are spaced apart from each other in a third direction.
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公开(公告)号：US12048150B2
公开(公告)日：2024-07-23
申请号：US17377848
申请日：2021-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung Hwan Lee , Yong Seok Kim , Il Gweon Kim , Hyun Cheol Kim , Hyeoung Won Seo , Sung Won Yoo , Jae Ho Hong
Abstract: A semiconductor memory device having improved electrical characteristics is provided. The semiconductor memory device comprises a first semiconductor pattern separated from a substrate in a first direction, a first gate structure extending in the first direction and penetrating the first semiconductor pattern, a first conductive connecting line connected to the first semiconductor pattern and extending in a second direction different from the first direction, and a second conductive connecting line connected to the first semiconductor pattern. The first gate structure is between the first conductive connecting line and the second conductive connecting line, the first gate structure includes a first gate electrode and a first gate insulating film, and the first gate insulating film includes a first charge holding film contacting with the first semiconductor pattern.
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公开(公告)号：US11024642B2
公开(公告)日：2021-06-01
申请号：US16508727
申请日：2019-07-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyung Hwan Lee , Yong Seok Kim , Jun Hee Lim , Kohji Kanamori
IPC: H01L27/11582
Abstract: A vertical memory device includes a stacked structure including a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers extending in a direction perpendicular to an upper surface of the substrate on a first side surface of the stacked structure and spaced apart from each other in a direction parallel to the upper surface of the substrate, and a common source layer disposed between the stacked structure and the substrate and contacting the channel layers.
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公开(公告)号：US10896711B2
公开(公告)日：2021-01-19
申请号：US16522121
申请日：2019-07-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kyung Hwan Lee , Seung Hyun Kim , Yong Seok Kim , Jun Hee Lim , Kohji Kanamori
IPC: G11C11/22 , H01L27/11585
Abstract: A memory device includes memory cells, the memory cells each including a first gate, a second gate electrically isolated from the first gate, a first gate insulating layer including a data storage layer having a ferroelectric material and disposed between the first gate and a channel region, a second gate insulating layer disposed between the second gate and the channel region, a first switching cell connected between the memory cells and a source line, and a second switching cell connected between the memory cells and a bit line. The second switching cell includes a third gate, a fourth gate, a third gate insulating layer not including a data storage layer having the ferroelectric material and the third gate disposed between the third gate and the channel region, and a fourth gate insulating layer disposed between the fourth gate and the channel region.
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