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公开(公告)号:US20150326194A1
公开(公告)日:2015-11-12
申请号:US14718158
申请日:2015-05-21
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Roh YAMAMOTO , Kazunori WATANABE
IPC: H03F3/45
CPC classification number: H03F3/45076 , G06G7/186 , H03F2203/45116 , H03F2203/45332 , H03K17/002
Abstract: A semiconductor device including an integrator circuit, in which electric discharge from a capacitor can be reduced to shorten time required for charging the capacitor in the case where supply of power supply voltage is stopped and restarted, and a method for driving the semiconductor device are provided. One embodiment has a structure in which a transistor with small off-state current is electrically connected in series to a capacitor in an integrator circuit. Further, in one embodiment of the present invention, a transistor with small off-state current is electrically connected in series to a capacitor in an integrator circuit; the transistor is on in a period during which power supply voltage is supplied; and the transistor is off in a period during which supply of the power supply voltage is stopped.
Abstract translation: 一种包括积分电路的半导体器件,其中可以减少从电容器的放电以缩短在停止并重新启动电源电压的情况下为电容器充电所需的时间,以及驱动该半导体器件的方法 。 一个实施例具有其中具有小截止电流的晶体管与积分电路中的电容器串联电连接的结构。 此外,在本发明的一个实施例中,具有小截止电流的晶体管与积分电路中的电容器串联电连接; 在提供电源电压的期间,晶体管导通; 在停止供电电压的期间,晶体管截止。
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公开(公告)号:US20250151428A1
公开(公告)日:2025-05-08
申请号:US19013101
申请日:2025-01-08
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takayuki IKEDA , Yoshiyuki KUROKAWA , Shintaro HARADA , Hidetomo KOBAYASHI , Roh YAMAMOTO , Kiyotaka KIMURA , Takashi NAKAGAWA , Yusuke NEGORO
Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
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公开(公告)号:US20230387147A1
公开(公告)日:2023-11-30
申请号:US18231871
申请日:2023-08-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takayuki IKEDA , Yoshiyuki KUROKAWA , Shintaro HARADA , Hidetomo KOBAYASHI , Roh YAMAMOTO , Kiyotaka KIMURA , Takashi NAKAGAWA , Yusuke NEGORO
IPC: H01L27/146 , H01L27/12 , H01L29/786 , H04N25/40 , H04N25/77 , H04N25/766
CPC classification number: H01L27/14605 , H01L27/1225 , H01L27/14612 , H01L27/14643 , H01L29/7869 , H04N25/40 , H04N25/77 , H04N25/766
Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
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公开(公告)号:US20200176493A1
公开(公告)日:2020-06-04
申请号:US16615156
申请日:2018-05-06
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takayuki IKEDA , Yoshiyuki KUROKAWA , Shintaro HARADA , Hidetomo KOBAYASHI , Roh YAMAMOTO , Kiyotaka KIMURA , Takashi NAKAGAWA , Yusuke NEGORO
IPC: H01L27/146 , H04N5/341 , H04N5/374 , H01L29/786 , H04N5/3745 , H01L27/12
Abstract: An imaging device capable of image processing is provided.The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
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公开(公告)号:US20200169683A1
公开(公告)日:2020-05-28
申请号:US16621115
申请日:2018-06-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Roh YAMAMOTO
IPC: H04N5/3745 , H01L27/146 , H01L29/786 , H01L29/24 , H01L31/032 , G06N3/02 , H01L31/0272
Abstract: An imaging device that facilitates pooling processing.A pixel region includes a plurality of pooling modules and an output circuit, the pooling module includes a pooling circuit and a comparison module, the pooling circuit includes a plurality of pixels and an arithmetic circuit, and the comparison module includes a plurality of comparison circuits and a determination circuit. The pixel can obtain a first signal through photoelectric conversion, and can multiply the first signal by a given scaling factor to generate a second signal. The pooling circuit adds a plurality of second signals in the arithmetic circuit to generate a third signal, the comparison module compares a plurality of third signals and outputs the largest third signal to the determination circuit, and the determination circuit determines the largest third signal and binarizes it to generate a fourth signal. In the imaging device, the pooling module performs pooling processing in accordance with the number of pixels and outputs data obtained by the pooling processing.
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公开(公告)号:US20180211595A1
公开(公告)日:2018-07-26
申请号:US15935184
申请日:2018-03-26
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kei TAKAHASHI , Roh YAMAMOTO
IPC: G09G3/3233 , G06F3/044 , G06F3/041
Abstract: A semiconductor device includes first to fourth terminals, a switch circuit, and an integrating circuit. The integrating circuit includes an amplifier circuit having a (−) terminal, a first (+) terminal, and a second (+) terminal. The integrating circuit is configured to integrate an input signal of the (−) terminal using an average voltage of a voltage of the first (+) terminal and a voltage of the second (+) terminal as a reference voltage. The switch circuit is configured to electrically connect the (−) terminal to the second terminal, the first (+) terminal to the first terminal, the second (+) terminal to the third terminal the (−) terminal to the third terminal, the first (+) terminal to the second terminal, and the second (+) terminal to the fourth terminal. The present semiconductor device is used as a semiconductor device sensing a current flowing through a pixel in a display panel.
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公开(公告)号:US20170221429A1
公开(公告)日:2017-08-03
申请号:US15409834
申请日:2017-01-19
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hidetomo KOBAYASHI , Roh YAMAMOTO , Kei TAKAHASHI
CPC classification number: G09G3/36 , G09G3/3688 , G09G2310/0291 , G09G2310/0294 , G11C27/024 , H01L27/1225 , H01L29/66969 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: Objects are to provide a semiconductor device with a novel structure, to provide a semiconductor device with low power consumption, and to provide a semiconductor device with a small chip area. A digital-analog converter and a frame memory are included. The frame memory includes a sample-and-hold circuit, a correction circuit, and a source follower circuit. The sample-and-hold circuit retains the analog voltage output from the digital-analog converter. The correction circuit corrects the analog voltage retained in the sample-and-hold circuit. The source-follower circuit outputs the corrected analog voltage. The sample-and-hold-circuit, the correction circuit, and the source follower circuit each comprise a first transistor. The first transistor comprises an oxide semiconductor layer in a semiconductor layer.
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公开(公告)号:US20170186371A1
公开(公告)日:2017-06-29
申请号:US15387273
申请日:2016-12-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kei TAKAHASHI , Roh YAMAMOTO
IPC: G09G3/3233 , G06F3/041 , G06F3/044
CPC classification number: G09G3/3233 , G06F3/0412 , G06F3/0416 , G06F3/044 , G06F2203/04107 , G09G2300/0426 , G09G2300/0809 , G09G2300/0842
Abstract: A semiconductor device includes first to fourth terminals, a switch circuit, and an integrating circuit. The integrating circuit includes an amplifier circuit having a (−) terminal, a first (+) terminal, and a second (+) terminal. The integrating circuit is configured to integrate an input signal of the (−) terminal using an average voltage of a voltage of the first (+) terminal and a voltage of the second (+) terminal as a reference voltage. The switch circuit is configured to electrically connect the (−) terminal to the second terminal, the first (+) terminal to the first terminal, the second (+) terminal to the third terminal the (−) terminal to the third terminal, the first (+) terminal to the second terminal, and the second (+) terminal to the fourth terminal. The present semiconductor device is used as a semiconductor device sensing a current flowing through a pixel in a display panel.
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公开(公告)号:US20170103714A1
公开(公告)日:2017-04-13
申请号:US15276992
申请日:2016-09-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Roh YAMAMOTO , Atsushi MIYAGUCHI
IPC: G09G3/34 , G02F1/1343 , G02F1/133 , G09G3/36 , G09G3/20
CPC classification number: G09G3/3413 , G02F1/13306 , G02F1/133345 , G02F1/13338 , G02F1/133512 , G02F1/133514 , G02F1/133528 , G02F1/133553 , G02F1/1337 , G02F1/134336 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F2001/134345 , G02F2201/44 , G02F2202/28 , G06F1/3265 , G06F3/0412 , G06F3/0416 , G09G3/2003 , G09G3/3225 , G09G3/3651 , G09G3/3677 , G09G3/3696 , G09G2300/0426 , G09G2300/0452 , G09G2300/0456 , G09G2310/0286 , G09G2320/0271 , G09G2320/0626 , G09G2330/021 , G09G2360/144 , Y02D10/153
Abstract: A semiconductor device with a novel structure is provided. The amount of data supplied to the semiconductor device for driving a display device including different display elements is reduced, so that the circuit area is reduced and power consumption is reduced. In a driver circuit for driving the display device including different display elements, gradation data to be applied to the display elements is generated. The generated gradation data given to different display elements are configured to differ in accordance with the designed luminance based on gradation data to be displayed and the intensity of reflected light based on illuminance data. Because the amount of data from the exterior to the driver circuit can be reduced, low power consumption due to a reduction in the data transfer rate, and a reduction in the circuit area due to a reduction in the size of an interface can be achieved.
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