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公开(公告)号:US10199535B2
公开(公告)日:2019-02-05
申请号:US15391994
申请日:2016-12-28
Applicant: Sensor Electronic Technology, Inc.
Inventor: Maxim S. Shatalov , Jinwei Yang , Alexander Dobrinsky , Michael Shur , Remigijus Gaska
IPC: H01L33/12 , H01L33/32 , H01L33/06 , H01L33/46 , H01L33/00 , C30B29/40 , G06F17/50 , H01L33/14 , H01L33/40
Abstract: A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.
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公开(公告)号:US10178726B2
公开(公告)日:2019-01-08
申请号:US15856625
申请日:2017-12-28
Applicant: Sensor Electronic Technology, Inc.
Inventor: Grigory Simin , Michael Shur , Alexander Dobrinsky , Maxim S. Shatalov
Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.
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公开(公告)号:US10096742B2
公开(公告)日:2018-10-09
申请号:US14984246
申请日:2015-12-30
Applicant: Sensor Electronic Technology, Inc.
Inventor: Maxim S. Shatalov , Jianyu Deng , Alexander Dobrinsky , Xuhong Hu , Remigijus Gaska , Michael Shur
Abstract: A light emitting device having improved light extraction is provided. The light emitting device can be formed by epitaxially growing a light emitting structure on a surface of a substrate. The substrate can be scribed to form a set of angled side surfaces on the substrate. For each angled side surface in the set of angled side surfaces, a surface tangent vector to at least a portion of each angled side surface in the set of angled side surfaces forms an angle between approximately ten and approximately eighty degrees with a negative of a normal vector of the surface of the substrate. The substrate can be cleaned to clean debris from the angled side surfaces.
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公开(公告)号:US20180248071A1
公开(公告)日:2018-08-30
申请号:US15966022
申请日:2018-04-30
Applicant: Sensor Electronic Technology, Inc.
Inventor: Rakesh Jain , Maxim S. Shatalov , Alexander Dobrinsky , Michael Shur
IPC: H01L33/00 , H01L31/105 , H01L31/0352 , H01L31/0224 , H01L33/04 , H01L33/14
Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described.
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15.
公开(公告)号:US10050174B2
公开(公告)日:2018-08-14
申请号:US15457088
申请日:2017-03-13
Applicant: Sensor Electronic Technology, Inc.
Inventor: Michael Shur , Maxim S. Shatalov , Alexander Dobrinsky , Remigijus Gaska , Jinwei Yang
Abstract: A device including one or more layers with lateral regions configured to facilitate the transmission of radiation through the layer and lateral regions configured to facilitate current flow through the layer is provided. The layer can comprise a short period superlattice, which includes barriers alternating with wells. In this case, the barriers can include both transparent regions, which are configured to reduce an amount of radiation that is absorbed in the layer, and higher conductive regions, which are configured to keep the voltage drop across the layer within a desired range.
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公开(公告)号:US10050172B2
公开(公告)日:2018-08-14
申请号:US15200575
申请日:2016-07-01
Applicant: Sensor Electronic Technology, Inc.
Inventor: Michael Shur , Alexander Dobrinsky , Maxim S. Shatalov
IPC: H01L33/00 , H01L21/02 , H01L21/78 , H01L21/304 , H01L21/306 , H01L21/683 , H01L33/06 , H01L33/14 , H01L33/32 , H01L33/38 , H01L33/62 , H01L33/56
Abstract: Fabrication of a heterostructure, such as a group III nitride heterostructure, for use in an optoelectronic device is described. The heterostructure can be epitaxially grown on a sacrificial layer, which is located on a substrate structure. The sacrificial layer can be at least partially decomposed using a laser. The substrate structure can be completely removed from the heterostructure or remain attached thereto. One or more additional solutions for detaching the substrate structure from the heterostructure can be utilized. The heterostructure can undergo additional processing to form the optoelectronic device.
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公开(公告)号:US20180124887A1
公开(公告)日:2018-05-03
申请号:US15856625
申请日:2017-12-28
Applicant: Sensor Electronic Technology, Inc.
Inventor: Grigory Simin , Michael Shur , Alexander Dobrinsky , Maxim S. Shatalov
CPC classification number: H05B33/0842 , H01L27/15 , H05B33/0809 , H05B33/0851 , H05B37/0227
Abstract: A solid-state light source (SSLS) structure with integrated control. In one embodiment, a SSLS control circuit can be integrated with a SSLS structure formed from a multiple of SSLSs. The SSLS control circuit controls the total operating current of the SSLS structure to within a predetermined total operating current limit by selectively limiting the current in individual SSLSs or in groups of SSLSs as each are turned on according to a sequential order. The SSLS control circuit limits the current in each of the individual SSLSs or groups of SSLSs as function of the saturation current of the SSLSs. In one embodiment, the individual SSLSs or groups of SSLSs has a turn on voltage corresponding to a voltage causing a preceding SSLS or group of SSLSs in the sequential order to saturate current.
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公开(公告)号:US20180108806A1
公开(公告)日:2018-04-19
申请号:US15857853
申请日:2017-12-29
Applicant: Sensor Electronic Technology, Inc.
Inventor: Rakesh Jain , Wenhong Sun , Jinwei Yang , Maxim S. Shatalov , Alexander Dobrinsky , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/06 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L29/0688 , H01L29/2003 , H01L29/518 , H01L29/7786 , H01L33/007 , H01L33/12 , H01L33/20 , H01L33/22 , H01L33/24 , H01L33/32 , H01L2933/0083 , H01L2933/0091
Abstract: A device having a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.
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公开(公告)号:US09923117B2
公开(公告)日:2018-03-20
申请号:US14984156
申请日:2015-12-30
Applicant: Sensor Electronic Technology, Inc.
Inventor: Maxim S. Shatalov , Alexander Dobrinsky , Alexander Lunev , Rakesh Jain , Jinwei Yang , Michael Shur , Remigijus Gaska
CPC classification number: H01L33/10 , H01L33/007 , H01L33/12 , H01L33/32 , H01L33/46
Abstract: A semiconductor layer including a plurality of inhomogeneous regions is provided. Each inhomogeneous region has one or more attributes that differ from a material forming the semiconductor layer. The inhomogeneous regions can include one or more regions configured based on radiation having a target wavelength. These regions can include transparent and/or reflective regions. The inhomogeneous regions also can include one or more regions having a higher conductivity than a conductivity of the radiation-based regions, e.g., at least ten percent higher. In one embodiment, the semiconductor layer is used to form an optoelectronic device.
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公开(公告)号:US20180069151A1
公开(公告)日:2018-03-08
申请号:US15797282
申请日:2017-10-30
Applicant: Sensor Electronic Technology, Inc.
Inventor: Remigijus Gaska , Maxim S. Shatalov , Michael Shur , Alexander Dobrinsky
IPC: H01L33/06 , H01L33/32 , H01L33/00 , H01L33/04 , H01L33/46 , H01L33/40 , H01L33/38 , H01L33/14 , H01L33/10 , H01L33/22
CPC classification number: H01L33/06 , B82Y20/00 , H01L33/0025 , H01L33/0075 , H01L33/04 , H01L33/10 , H01L33/145 , H01L33/22 , H01L33/32 , H01L33/38 , H01L33/385 , H01L33/405 , H01L33/46 , H01L2933/0058
Abstract: A method of fabricating a light emitting diode, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer, is provided. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure.
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