公开(公告)号：US20190051591A1

公开(公告)日：2019-02-14

申请号：US16078331

申请日：2017-02-24

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Muhammad Amin Saleem ,  Peter Enoksson ,  Vincent Desmaris ,  Rickard Andersson

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/14 ,  H01L23/538

CPC classification number: H01L23/49827 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49811 ,  H01L23/50 ,  H01L23/5389

Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.

公开(公告)号：US12033797B2

公开(公告)日：2024-07-09

申请号：US17283105

申请日：2019-10-07

Applicant: Smoltek AB

Inventor： Vincent Desmaris ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Anders Johansson ,  Fredrik Liljeberg ,  Ola Tiverman ,  M Shafiqul Kabir

IPC: H01G11/36 ,  H01G11/56 ,  H01M10/0585 ,  H01M50/11 ,  H05K1/18

CPC classification number: H01G11/36 ,  H01G11/56 ,  H01M10/0585 ,  H01M50/11 ,  H05K1/181 ,  H05K2201/10015 ,  H05K2201/10037

Abstract: A discrete metal-insulator-metal (MIM) energy storage component, the energy storage component comprising: a MIM-arrangement comprising: a first electrode layer; a plurality of conductive nanostructures grown from the first electrode layer; a conduction controlling material covering each nanostructure in the plurality of conductive nanostructures and the first electrode layer uncovered by the conductive nanostructures; and a second electrode layer covering the conduction controlling material; a first connecting structure for external electrical connection of the capacitor component; a second connecting structure for external electrical connection of the capacitor component; and an electrically insulating encapsulation material at least partly embedding the MIM-arrangement.

公开(公告)号：US20230075019A1

公开(公告)日：2023-03-09

申请号：US17795999

申请日：2021-01-28

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Vincent Desmaris ,  Anders Johansson ,  Ola Tiverman ,  Karl Lundahl ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Victor Marknäs

IPC: H01L25/16 ,  H05K1/11 ,  H01G4/005 ,  H01L49/02 ,  H01L23/00 ,  H01L23/64 ,  H05K1/02

Abstract: An electronic system comprising a substrate with a substrate conductor pattern including substrate pads; a semiconductor component with active circuitry, and component pads coupled to the active circuitry of the semiconductor component and connected to the substrate pads of the substrate; a power source interface for receiving power from a power source; and a power distribution network for distributing power from the power source interface to the active circuitry of the semiconductor component. The power distribution network includes a first capacitor realized by conductive structures comprised in the semiconductor component, the first capacitor being coupled to a first component pad and a second component pad of the semiconductor component; a second capacitor arranged between the substrate and the semiconductor component, the second capacitor being coupled to the first component pad and the second component pad of the component package; and a power grid portion of the substrate conductor pattern.

公开(公告)号：US20220005777A1

公开(公告)日：2022-01-06

申请号：US17289060

申请日：2019-11-20

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Vincent Desmaris ,  Rickard Andersson ,  Muhammad Amin Saleem ,  Maria Bylund ,  Anders Johansson ,  Fredrik Liljeberg ,  Ola Tiverman

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/10 ,  H01L49/02

Abstract: A semiconductor assembly, comprising: a first semiconductor die including processing circuitry and pads, said first semiconductor die having a first surface and a second surface opposite the first surface; a second semiconductor die including memory circuitry and pads, said second semiconductor die being arranged on one of the first surface and the second surface of said first semiconductor die, and pads of said second semiconductor die being coupled to pads of said first semiconductor die; and at least a first capacitor having terminals, said first capacitor being arranged on one of the first surface and the second surface of said first semiconductor die and the terminals of said capacitor being coupled to pads of said first semiconductor die.

公开(公告)号：US20210043594A1

公开(公告)日：2021-02-11

申请号：US17077237

申请日：2020-10-22

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Vincent Desmaris ,  Muhammad Amin Saleem

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/31 ,  H01L23/498

Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side being opposite to the first side, the connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate.

公开(公告)号：US10438880B2

公开(公告)日：2019-10-08

申请号：US16078331

申请日：2017-02-24

Applicant: Smoltek AB

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Muhammad Amin Saleem ,  Peter Enoksson ,  Vincent Desmaris ,  Rickard Andersson

IPC: H01L23/34 ,  H01L23/498 ,  H01G4/35 ,  H01L23/50 ,  H01L21/48 ,  H01L23/14 ,  H01L23/538

Abstract: An interposer device comprising an interposer substrate; a plurality of conducting vias extending through the interposer substrate; a conductor pattern on the interposer substrate, and a nanostructure energy storage device. The nanostructure energy storage device comprises at least a first plurality of conductive nanostructures formed on the interposer substrate; a conduction controlling material embedding each nanostructure in the first plurality of conductive nanostructures; a first electrode connected to each nanostructure in the first plurality of nanostructures; and a second electrode separated from each nanostructure in the first plurality of nanostructures by the conduction controlling material, wherein the first electrode and the second electrode are configured to allow electrical connection of the nanostructure energy storage device to the integrated circuit.

公开(公告)号：US20190267345A1

公开(公告)日：2019-08-29

申请号：US16094595

申请日：2017-05-03

Applicant: Smoltek AB.

Inventor： M Shafiqul Kabir ,  Anders Johansson ,  Vincent Desmaris ,  Muhammad Amin Saleem

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/48

Abstract: An assembly platform for arrangement as an interposer device between an integrated circuit and a substrate to interconnect the integrated circuit and the substrate through the assembly platform, the assembly platform comprising: an assembly substrate; a plurality of conducting vias extending through the assembly substrate; at least one nanostructure connection bump on a first side of the assembly substrate, the nanostructure connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate, wherein each of the nanostructure connection bumps comprises: a plurality of elongated conductive nanostructures vertically grown on the first side of the assembly substrate, wherein the plurality of elongated nanostructures are embedded in a metal for the connection with at least one of the integrated circuit and the substrate, at least one connection bump on a second side of the assembly substrate, the second side being opposite to the first side, the connection bump being conductively connected to the vias and defining connection locations for connection with at least one of the integrated circuit and the substrate.