公开(公告)号：US12057443B2

公开(公告)日：2024-08-06

申请号：US17687380

申请日：2022-03-04

Applicant: Texas Instruments Incorporated

Inventor： Akram A. Salman ,  Farzan Farbiz ,  Amitava Chatterjee ,  Xiaoju Wu

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/74

CPC classification number: H01L27/0262 ,  H01L29/1012 ,  H01L29/7424 ,  H01L29/7436

Abstract: A semiconductor controlled rectifier (FIG. 4A) for an integrated circuit is disclosed. The semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region and electrically connected to the second and third lightly doped regions.

公开(公告)号：US11094817B2

公开(公告)日：2021-08-17

申请号：US16750020

申请日：2020-01-23

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiaoju Wu ,  Robert James Todd ,  Henry Litzmann Edwards

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/06 ,  H01L29/40 ,  H01L21/74 ,  H01L21/762 ,  H01L21/265 ,  H01L21/324 ,  H01L21/225 ,  H01L21/285

Abstract: A semiconductor device includes a local oxidation of silicon (LOCOS) structure and a shallow trench isolation (STI) structure formed over a semiconductor substrate. A source region is located between the LOCOS structure and the STI structure. A gate structure is located between the source region and the LOCOS structure. A contact may be located over the STI structure electrically connect to the gate structure.

公开(公告)号：US20200075583A1

公开(公告)日：2020-03-05

申请号：US16118648

申请日：2018-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Robert M. Higgins ,  Henry Litzmann Edwards ,  Xiaoju Wu ,  Shariq Arshad ,  Li Wang ,  Jonathan Philip Davis ,  Tathagata Chatterjee

IPC: H01L27/06 ,  H01L29/06 ,  H01L21/762 ,  H01L21/8234 ,  H01L49/02 ,  G06F17/50

Abstract: The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion.

公开(公告)号：US10014405B1

公开(公告)日：2018-07-03

申请号：US15596925

申请日：2017-05-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Xiaoju Wu

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/49 ,  H01L29/66 ,  H01L21/266

Abstract: In at least some embodiments, a semiconductor device comprises a source region is formed within a well. The source region comprises a first dopant type, and the well comprises a second dopant type opposite the first dopant type. A termination region is formed within the well, the termination region being aligned with the source region and having an end adjacent to and spaced apart from an end of the source region. The termination region comprises a semiconducting material having the second dopant type. A preselected concentration value of the dopant in the termination region is greater than a concentration value of the second dopant type in the well.

公开(公告)号：US20170256537A1

公开(公告)日：2017-09-07

申请号：US15060736

申请日：2016-03-04

Applicant: Texas Instruments Incorporated

Inventor： Xiaoju Wu ,  C. Matthew Thompson

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L27/088 ,  H01L21/823418 ,  H01L21/823814 ,  H01L29/0638 ,  H01L29/0847 ,  H01L29/1033

Abstract: An integrated circuit with transistor regions formed on a substrate. Each transistor region includes a channel region and a terminal region. The channel region is positioned along a traverse dimension, and it includes a channel edge region along a longitudinal dimension. The terminal region is positioned adjacent to the channel region, and it is doped with a first dopant of a first conductivity type. Each transistor region may include an edge block region, which is positioned along the longitudinal dimension and adjacent to the channel edge region. The edge block region is doped with a second dopant of a second conductivity type opposite to the first conductivity type. The channel region doped with a dopant and having a first doping concentration. Each transistor region may include an edge recovery region overlapping with the channel edge region and having a second doping concentration higher than the first doping concentration.

公开(公告)号：US20150294967A1

公开(公告)日：2015-10-15

申请号：US14750339

申请日：2015-06-25

Applicant: Texas Instruments Incorporated

Inventor： Akram A. Salman ,  Farzan Farbiz ,  Amitava Chatterjee ,  Xiaoju Wu

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/74

CPC classification number: H01L27/0262 ,  H01L29/1012 ,  H01L29/7424 ,  H01L29/7436

Abstract: A semiconductor controlled rectifier (FIG. 4A) for an integrated circuit is disclosed. The semiconductor controlled rectifier comprises a first lightly doped region (100) having a first conductivity type (N) and a first heavily doped region (108) having a second conductivity type (P) formed within the first lightly doped region. A second lightly doped region (104) having the second conductivity type is formed proximate the first lightly doped region. A second heavily doped region (114) having the first conductivity type is formed within the second lightly doped region. A buried layer (101) having the first conductivity type is formed below the second lightly doped region and electrically connected to the first lightly doped region. A third lightly doped region (102) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region. A fourth lightly doped region (400) having the second conductivity type is formed between the second lightly doped region and the third heavily doped region and electrically connected to the second and third lightly doped regions.

Abstract translation: 公开了一种用于集成电路的半导体可控整流器（图4A）。 半导体可控整流器包括具有第一导电类型（N）的第一轻掺杂区域（100）和在第一轻掺杂区域内形成的具有第二导电类型（P）的第一重掺杂区域（108）。 具有第二导电类型的第二轻掺杂区域（104）形成在第一轻掺杂区域附近。 在第二轻掺杂区域内形成具有第一导电类型的第二重掺杂区域（114）。 具有第一导电类型的掩埋层（101）形成在第二轻掺杂区域的下方并且电连接到第一轻掺杂区域。 在第二轻掺杂区域和第三重掺杂区域之间形成具有第二导电类型的第三轻掺杂区域（102）。 具有第二导电类型的第四轻掺杂区域（400）形成在第二轻掺杂区域和第三重掺杂区域之间，并且电连接到第二和第三轻掺杂区域。

公开(公告)号：US11916067B2

公开(公告)日：2024-02-27

申请号：US17684774

申请日：2022-03-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Robert M. Higgins ,  Henry Litzmann Edwards ,  Xiaoju Wu ,  Shariq Arshad ,  Li Wang ,  Jonathan Philip Davis ,  Tathagata Chatterjee

IPC: H01L27/06 ,  H01L29/06 ,  H01L21/8234 ,  H01L21/762 ,  G06F30/392 ,  H01L49/02

CPC classification number: H01L27/0629 ,  G06F30/392 ,  H01L21/762 ,  H01L21/823481 ,  H01L28/20 ,  H01L29/0649

Abstract: The present disclosure introduces, among other things, an electronic device, e.g. an integrated circuit (IC). The IC includes a semiconductor substrate comprising a first doped layer of a first conductivity type. A second doped layer of the first conductivity type is located within the first doped layer. The second doped layer has first and second layer portions with a greater dopant concentration than the first doped layer, with the first layer portion being spaced apart from the second layer portion laterally with respect to a surface of the substrate. The IC further includes a lightly doped portion of the first doped layer, the lightly doped portion being located between the first and second layer portions. A dielectric isolation structure is located between the first and second layer portions, and directly contacts the lightly doped portion.

公开(公告)号：US11374124B2

公开(公告)日：2022-06-28

申请号：US16021647

申请日：2018-06-28

Applicant: Texas Instruments Incorporated

Inventor： James Robert Todd ,  Xiaoju Wu ,  Henry Litzmann Edwards ,  Binghua Hu

IPC: H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  H01L21/285 ,  H01L29/417 ,  H01L29/66 ,  H01L49/02 ,  H01L27/06

Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods in which a silicide block material or other protection layer is formed on a field oxide structure above a drift region to protect the field oxide structure from damage during deglaze processing. Further described examples include a shallow trench isolation (STI) structure that laterally surrounds an active region of a semiconductor substrate, where the STI structure is laterally spaced from the oxide structure, and is formed under gate contacts of the transistor.

公开(公告)号：US11152505B2

公开(公告)日：2021-10-19

申请号：US16021601

申请日：2018-06-28

Applicant: Texas Instruments Incorporated

Inventor： Alexei Sadovnikov ,  Andrew Derek Strachan ,  Henry Litzmann Edwards ,  Dhanoop Varghese ,  Xiaoju Wu ,  Binghua Hu ,  James Robert Todd

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L21/265 ,  H01L29/08 ,  H01L21/266

Abstract: Described examples include integrated circuits, drain extended transistors and fabrication methods in which an oxide structure is formed over a drift region of a semiconductor substrate, and a shallow implantation process is performed using a first mask that exposes the oxide structure and a first portion of the semiconductor substrate to form a first drift region portion for connection to a body implant region. A second drift region portion is implanted in the semiconductor substrate under the oxide structure by a second implantation process using the first mask at a higher implant energy.

公开(公告)号：US10326014B2

公开(公告)日：2019-06-18

申请号：US15988543

申请日：2018-05-24

Applicant: Texas Instruments Incorporated

Inventor： Xiaoju Wu

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/49 ,  H01L29/66 ,  H01L21/266

Abstract: In at least some embodiments, a semiconductor device comprises a source region is formed within a well. The source region comprises a first dopant type, and the well comprises a second dopant type opposite the first dopant type. A termination region is formed within the well, the termination region being aligned with the source region and having an end adjacent to and spaced apart from an end of the source region. The termination region comprises a semiconducting material having the second dopant type. A preselected concentration value of the dopant in the termination region is greater than a concentration value of the second dopant type in the well.