公开(公告)号：US20140199854A1

公开(公告)日：2014-07-17

申请号：US13742467

申请日：2013-01-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chih-Chung Chen ,  Tsuo-Wen Lu ,  Yu-Ren Wang

IPC: H01L21/02

CPC classification number: H01L21/02312 ,  C23C16/02 ,  C23C16/45546 ,  C23C16/4583 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/02304

Abstract: A method of forming a film is provided. The method includes at least the following steps. A first substrate and a second substrate are provided in a batch processing system, wherein a first surface of the first substrate is adjacent to a second surface of the second substrate, the first surface of the first substrate has a first surface condition, the second surface of the second substrate has a second surface condition, and the first surface condition is different from the second surface condition. A pretreatment gas is provided to the surfaces of the substrates for transforming the first surface condition and the second surface condition to a third surface condition. A reaction gas is provided to form the film on the surfaces, having the third surface condition, of the substrates.

Abstract translation: 提供了一种形成膜的方法。 该方法至少包括以下步骤。 第一基板和第二基板设置在间歇处理系统中，其中第一基板的第一表面与第二基板的第二表面相邻，第一基板的第一表面具有第一表面状态，第二表面 所述第二基板具有第二表面状态，所述第一表面状态与所述第二表面状态不同。 将预处理气体提供到基板的表面，用于将第一表面状态和第二表面状态转换成第三表面状态。 提供反应气体以在具有第三表面状态的基底的表面上形成膜。

公开(公告)号：US11735646B2

公开(公告)日：2023-08-22

申请号：US17090902

申请日：2020-11-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Chang Lin ,  Bo-Han Huang ,  Chih-Chung Chen ,  Chun-Hsien Lin ,  Shih-Hung Tsai ,  Po-Kuang Hsieh

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/78 ,  H01L29/51

CPC classification number: H01L29/66795 ,  H01L21/02052 ,  H01L21/02054 ,  H01L29/517 ,  H01L29/7851

Abstract: A method for fabricating semiconductor device includes the steps of: forming fin-shaped structures on a substrate; using isopropyl alcohol (IPA) to perform a rinse process; performing a baking process; and forming a gate oxide layer on the fin-shaped structures. Preferably, a duration of the rinse process is between 15 seconds to 60 seconds, a temperature of the baking process is between 50° C. to 100° C., and a duration of the baking process is between 5 seconds to 120 seconds.

公开(公告)号：US20170345938A1

公开(公告)日：2017-11-30

申请号：US15681417

申请日：2017-08-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Sheng-Hsu Liu ,  Jhen-cyuan Li ,  Chih-Chung Chen ,  Man-Ling Lu ,  Chung-Min Tsai ,  Yi-Wei Chen

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/165

CPC classification number: H01L29/7851 ,  H01L21/764 ,  H01L29/0649 ,  H01L29/0692 ,  H01L29/165 ,  H01L29/66795 ,  H01L29/7848 ,  Y02E10/50

Abstract: A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The second semiconductor layer includes a recessed portion, the air gap is located in the recessed portion, and the recessed portion has an upwardly-opening acute angle in the range from about 10° to about 55°. The air gap may prevent current leakage. A FinFET device may be manufactured by first recessing and then epitaxially re-growing a source/drain fin, with the regrowth starting over a tubular air gap.

公开(公告)号：US09130014B2

公开(公告)日：2015-09-08

申请号：US14085811

申请日：2013-11-21

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Keng-Jen Lin ,  Yu-Ren Wang ,  Chien-Liang Lin ,  Tsuo-Wen Lu ,  Wei-Jen Chen ,  Chih-Chung Chen

IPC: H01L21/762 ,  H01L21/02

CPC classification number: H01L21/76237 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0228 ,  H01L21/32105 ,  H01L21/76205 ,  H01L21/76224

Abstract: A method for fabricating shallow trench isolation structure is disclosed. The method includes the steps of: (a) providing a substrate; (b) forming a trench in the substrate; (c) forming a silicon layer in the trench; and (d) performing an oxidation process to partially transform a surface of the silicon layer into an oxide layer.

Abstract translation: 公开了一种用于制造浅沟槽隔离结构的方法。 该方法包括以下步骤：（a）提供衬底; （b）在衬底中形成沟槽; （c）在沟槽中形成硅层; 和（d）进行氧化处理以将硅层的表面部分地转变为氧化物层。