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公开(公告)号:US20170345938A1
公开(公告)日:2017-11-30
申请号:US15681417
申请日:2017-08-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Sheng-Hsu Liu , Jhen-cyuan Li , Chih-Chung Chen , Man-Ling Lu , Chung-Min Tsai , Yi-Wei Chen
IPC: H01L29/78 , H01L29/06 , H01L29/165
CPC classification number: H01L29/7851 , H01L21/764 , H01L29/0649 , H01L29/0692 , H01L29/165 , H01L29/66795 , H01L29/7848 , Y02E10/50
Abstract: A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The second semiconductor layer includes a recessed portion, the air gap is located in the recessed portion, and the recessed portion has an upwardly-opening acute angle in the range from about 10° to about 55°. The air gap may prevent current leakage. A FinFET device may be manufactured by first recessing and then epitaxially re-growing a source/drain fin, with the regrowth starting over a tubular air gap.
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公开(公告)号:US20180097110A1
公开(公告)日:2018-04-05
申请号:US15281993
申请日:2016-09-30
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Tsung-Mu Yang , Kuang-Hsiu Chen , Chun-Liang Kuo , Tsang-Hsuan Wang , Yu-Ming Hsu , Fu-Cheng Yen , Chung-Min Tsai
IPC: H01L29/78 , H01L29/08 , H01L29/24 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/267 , H01L29/66 , H01L21/02
CPC classification number: H01L29/7848 , H01L21/02057 , H01L29/66636 , H01L29/66795
Abstract: A method for manufacturing a semiconductor structure comprises the following steps. First, a recess is formed in a substrate. At least one wet cleaning process is performed to the recess and the substrate. Then, a baking process is performed to the recess and the substrate in an atmosphere containing H2 gas. After the baking process, a dry cleaning process is performed the recess and the substrate.
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公开(公告)号:US09847393B2
公开(公告)日:2017-12-19
申请号:US15286541
申请日:2016-10-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Chun-Liang Kuo , Tsang-Hsuan Wang , Sheng-Hsu Liu , Chieh-Lung Wu , Chung-Min Tsai , Yi-Wei Chen
IPC: H01L29/66 , H01L29/24 , H01L29/78 , H01L29/165
CPC classification number: H01L29/24 , H01L29/0847 , H01L29/165 , H01L29/66636 , H01L29/66795 , H01L29/7834 , H01L29/7848
Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate, a gate structure on the substrate, a spacer adjacent to the gate structure, an epitaxial layer in the substrate adjacent to two sides of the spacer, and a dislocation embedded within the epitaxial layer. Preferably, the top surface of the epitaxial layer is lower than the top surface of the substrate, and the top surface of the epitaxial layer has a V-shape.
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公开(公告)号:US20170133470A1
公开(公告)日:2017-05-11
申请号:US15286541
申请日:2016-10-05
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Chun-Liang Kuo , Tsang-Hsuan Wang , Sheng-Hsu Liu , Chieh-Lung Wu , Chung-Min Tsai , Yi-Wei Chen
IPC: H01L29/24 , H01L29/66 , H01L29/165 , H01L29/78
CPC classification number: H01L29/24 , H01L29/0847 , H01L29/165 , H01L29/66636 , H01L29/66795 , H01L29/7834 , H01L29/7848
Abstract: A semiconductor device is disclosed. The semiconductor device includes: a substrate, a gate structure on the substrate, a spacer adjacent to the gate structure, an epitaxial layer in the substrate adjacent to two sides of the spacer, and a dislocation embedded within the epitaxial layer. Preferably, the top surface of the epitaxial layer is lower than the top surface of the substrate, and the top surface of the epitaxial layer has a V-shape.
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公开(公告)号:US10236179B2
公开(公告)日:2019-03-19
申请号:US15099581
申请日:2016-04-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Fu-Cheng Yen , Tsung-Mu Yang , Sheng-Hsu Liu , Tsang-Hsuan Wang , Chun-Liang Kuo , Yu-Ming Hsu , Chung-Min Tsai , Yi-Wei Chen
Abstract: A method for forming an epitaxial layer on a substrate is disclosed. The method includes the steps of: providing a substrate into a chamber; injecting a precursor and a carrier gas to form the epitaxial layer on the substrate at a starting pressure; and pumping down the starting pressure to a second pressure according to a gradient during a cool down process in the chamber.
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公开(公告)号:US10158022B2
公开(公告)日:2018-12-18
申请号:US15681417
申请日:2017-08-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Sheng-Hsu Liu , Jhen-cyuan Li , Chih-Chung Chen , Man-Ling Lu , Chung-Min Tsai , Yi-Wei Chen
IPC: H01L29/78 , H01L29/06 , H01L29/165 , H01L29/66 , H01L21/764
Abstract: A fin structure for a semiconductor device, such as a FinFET structure, has first and second semiconductor layers and an air gap between the layers. The second semiconductor layer includes a recessed portion, the air gap is located in the recessed portion, and the recessed portion has an upwardly-opening acute angle in the range from about 10° to about 55°. The air gap may prevent current leakage. A FinFET device may be manufactured by first recessing and then epitaxially re-growing a source/drain fin, with the regrowth starting over a tubular air gap.
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公开(公告)号:US20170301536A1
公开(公告)日:2017-10-19
申请号:US15099581
申请日:2016-04-14
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Fu-Cheng Yen , Tsung-Mu Yang , Sheng-Hsu Liu , Tsang-Hsuan Wang , Chun-Liang Kuo , Yu-Ming Hsu , Chung-Min Tsai , Yi-Wei Chen
CPC classification number: H01L21/0262 , H01L21/02381 , H01L21/02532 , H01L21/02576 , H01L21/02639 , H01L29/66795 , H01L29/7848
Abstract: A method for forming an epitaxial layer on a substrate is disclosed. The method includes the steps of: providing a substrate into a chamber; injecting a precursor and a carrier gas to form the epitaxial layer on the substrate at a starting pressure; and pumping down the starting pressure to a second pressure according to a gradient during a cool down process in the chamber.
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公开(公告)号:US09496396B1
公开(公告)日:2016-11-15
申请号:US14961902
申请日:2015-12-08
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yu-Ming Hsu , Chun-Liang Kuo , Tsang-Hsuan Wang , Sheng-Hsu Liu , Chieh-Lung Wu , Chung-Min Tsai , Yi-Wei Chen
CPC classification number: H01L29/24 , H01L29/0847 , H01L29/165 , H01L29/66636 , H01L29/66795 , H01L29/7834 , H01L29/7848
Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: (a) providing a substrate; (b) forming a gate structure on the substrate; (c) performing a first deposition process to form a first epitaxial layer adjacent to the gate structure and performing a first etching process to remove part of the first epitaxial layer at the same time; and (d) performing a second etching process to remove part of the first epitaxial layer.
Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:(a)提供衬底; (b)在所述基板上形成栅极结构; (c)执行第一沉积工艺以形成与所述栅极结构相邻的第一外延层,并且执行第一蚀刻工艺以同时去除所述第一外延层的一部分; 和(d)执行第二蚀刻工艺以去除第一外延层的一部分。
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公开(公告)号:US09397214B1
公开(公告)日:2016-07-19
申请号:US14622943
申请日:2015-02-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Tien-Chen Chan , Hsin-Chang Wu , Chun-Yu Chen , Ming-Hua Chang , Sheng-Hsu Liu , Chieh-Lung Wu , Chung-Min Tsai , Neng-Hui Yang
IPC: H01L27/092 , H01L29/66 , H01L21/8238 , H01L29/78 , H01L29/36 , H01L29/161
CPC classification number: H01L29/7848 , H01L29/165 , H01L29/785
Abstract: A semiconductor device is provided includes a substrate, a gate structure formed on the substrate, an epitaxial source/drain structure respectively formed at two sides of the gate structure, and a boron-rich interface layer. The boron-rich interface layer includes a bottom-and-sidewall portion and a top portion, and the epitaxial source/drain structure is enclosed by the bottom-and-sidewall portion and the top portion.
Abstract translation: 提供了一种半导体器件,包括衬底,形成在衬底上的栅极结构,分别形成在栅极结构的两侧的外延源极/漏极结构和富含硼的界面层。 富硼界面层包括底侧和侧壁部分和顶部,并且外延源极/漏极结构被底部和侧壁部分以及顶部部分包围。
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