公开(公告)号：US20170330952A1

公开(公告)日：2017-11-16

申请号：US15182620

申请日：2016-06-15

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Zhen Wu ,  Hsiao-Pang Chou ,  Chiu-Hsien Yeh ,  Shui-Yen Lu ,  Jian-Wei Chen

IPC: H01L29/51 ,  H01L29/423 ,  H01L29/40 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66

CPC classification number: H01L29/512 ,  H01L21/82345 ,  H01L21/823462 ,  H01L27/088 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/78

Abstract: A semiconductor device and a method of forming the same, the semiconductor device include a substrate, and a first gate structure and a second gate structure disposed on the substrate. The first gate structure includes a barrier layer, a first work function layer, a second work function layer and a conductive layer stacked one over another on the substrate. The second gate structure includes the barrier layer, a portion of the first work function layer and the conductive layer stacked one over another on the substrate, wherein the portion of the first work function layer has a smaller thickness than a thickness of the first work function layer.

公开(公告)号：US20160336194A1

公开(公告)日：2016-11-17

申请号：US14711752

申请日：2015-05-13

Applicant: United Microelectronics Corp.

Inventor： Chiu-Hsien Yeh ,  Zhen Wu ,  Yen-Cheng Chang ,  Yu-Ting Tseng

IPC: H01L21/321 ,  H01L21/308 ,  H01L21/8238 ,  H01L21/283

CPC classification number: H01L21/823821 ,  H01L21/02041 ,  H01L21/28088 ,  H01L21/31133 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

Abstract: A method of forming a semiconductor device includes following steps. First of all, a first work function layer is formed on a substrate. Next, a first patterned photoresist layer is formed on the first work function layer. Then, the first work function layer is partially removed by using the first patterned photoresist layer as a mask to form a patterned first work function layer. Subsequently, the first patterned photoresist layer is removed by providing radical oxygen.

Abstract translation: 形成半导体器件的方法包括以下步骤。 首先，在基板上形成第一功函数层。 接下来，在第一功函数层上形成第一图案化光致抗蚀剂层。 然后，通过使用第一图案化的光致抗蚀剂层作为掩模来部分去除第一功函数层以形成图案化的第一功函数层。 随后，通过提供自由基氧来除去第一图案化的光致抗蚀剂层。

公开(公告)号：US09312258B2

公开(公告)日：2016-04-12

申请号：US13936214

申请日：2013-07-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Guang-Yaw Hwang ,  Ling-Chun Chou ,  I-Chang Wang ,  Shin-Chuan Huang ,  Jiunn-Hsiung Liao ,  Shin-Chi Chen ,  Pau-Chung Lin ,  Chiu-Hsien Yeh ,  Chin-Cheng Chien ,  Chieh-Te Chen

IPC: H01L27/088 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L27/088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.

公开(公告)号：US20180151685A1

公开(公告)日：2018-05-31

申请号：US15863990

申请日：2018-01-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Zhen Wu ,  Hsiao-Pang Chou ,  Chiu-Hsien Yeh ,  Shui-Yen Lu ,  Jian-Wei Chen

IPC: H01L29/51 ,  H01L29/66 ,  H01L29/423 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/40

CPC classification number: H01L29/512 ,  H01L21/82345 ,  H01L21/823462 ,  H01L27/088 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/78

Abstract: A method of forming a semiconductor device includes the following steps. A substrate is provided, and the substrate has a first region. A barrier layer is then formed on the first region of the substrate. A first work function layer is formed on the barrier layer. An upper half portion of the first work function layer is converted into a non-volatile material layer. The non-volatile material layer is removed and a lower half portion of the first work function layer is kept.

公开(公告)号：US20170294523A1

公开(公告)日：2017-10-12

申请号：US15095154

申请日：2016-04-10

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Zhen Wu ,  Chiu-Hsien Yeh ,  Po-Wen Su ,  Kuan-Ying Lai

IPC: H01L29/66 ,  H01L21/768 ,  H01L21/304 ,  H01L21/02 ,  H01L21/28

CPC classification number: H01L29/66795 ,  H01L21/02603 ,  H01L21/28158 ,  H01L21/304 ,  H01L21/76897 ,  H01L29/0676 ,  H01L29/42392 ,  H01L29/66666 ,  H01L29/66742 ,  H01L29/78618 ,  H01L29/78642 ,  H01L29/78696

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first organic layer on the substrate; patterning the first organic layer to form an opening; forming a second organic layer in the opening; and removing the first organic layer to form a patterned second organic layer on the substrate.

公开(公告)号：US20150079777A1

公开(公告)日：2015-03-19

申请号：US14029824

申请日：2013-09-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ted Ming-Lang Guo ,  Chiu-Hsien Yeh ,  Chin-Cheng Chien ,  Chun-Yuan Wu

IPC: H01L21/28

CPC classification number: H01L21/28176 ,  H01L21/321 ,  H01L21/32134 ,  H01L21/823842 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7833

Abstract: A method of manufacturing a semiconductor device having a metal gate is provided. A substrate having a first conductive type transistor and a second conductive type transistor formed thereon is provided. The first conductive type transistor has a first trench and the second conductive type transistor has a second trench. A first work function layer is formed in the first trench. A hardening process is performed for the first work function layer. A softening process is performed for a portion of the first work function layer. A pull back step is performed to remove the portion of the first work function layer. A second work function layer is formed in the second trench. A low resistive metal layer is formed in the first trench and the second trench.

Abstract translation: 提供一种制造具有金属栅极的半导体器件的方法。 提供具有形成在其上的第一导电型晶体管和第二导电型晶体管的衬底。 第一导电型晶体管具有第一沟槽，第二导电型晶体管具有第二沟槽。 在第一沟槽中形成第一功函数层。 对第一功函数层进行硬化处理。 对第一功函数层的一部分进行软化处理。 执行拉回步骤以去除第一功函数层的部分。 在第二沟槽中形成第二功函数层。 在第一沟槽和第二沟槽中形成低电阻金属层。

公开(公告)号：US20130292775A1

公开(公告)日：2013-11-07

申请号：US13936214

申请日：2013-07-08

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Guang-Yaw Hwang ,  Ling-Chun Chou ,  I-Chang Wang ,  Shin-Chuan Huang ,  Jiunn-Hsiung Liao ,  Shin-Chi Chen ,  Pau-Chung Lin ,  Chiu-Hsien Yeh ,  Chin-Cheng Chien ,  Chieh-Te Chen

IPC: H01L27/088

CPC classification number: H01L27/088 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: A strained silicon substrate structure includes a first transistor and a second transistor disposed on a substrate. The first transistor includes a first gate structure and two first source/drain regions disposed at two sides of the first gate structure. A first source/drain to gate distance is between each first source/drain region and the first gate structure. The second transistor includes a second gate structure and two source/drain doped regions disposed at two side of the second gate structure. A second source/drain to gate distance is between each second source/drain region and the second gate structure. The first source/drain to gate distance is smaller than the second source/drain to gate distance.

Abstract translation: 应变硅衬底结构包括设置在衬底上的第一晶体管和第二晶体管。 第一晶体管包括第一栅极结构和设置在第一栅极结构的两侧的两个第一源极/漏极区域。 第一源极/漏极到栅极间距在每个第一源极/漏极区域和第一栅极结构之间。 第二晶体管包括第二栅极结构和设置在第二栅极结构的两侧的两个源极/漏极掺杂区域。 第二源极/漏极到栅极间距在每个第二源极/漏极区域和第二栅极结构之间。 第一源极/漏极到栅极距离小于第二源极/漏极到栅极距离。