公开(公告)号：US11482830B2

公开(公告)日：2022-10-25

申请号：US17013965

申请日：2020-09-08

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Van-Truong Dai

IPC: H01S5/00 ,  H01S5/183 ,  G01N21/55 ,  G01J3/45

Abstract: A measurement method for a vertical cavity surface emitting laser diode (VCSEL) and an epitaxial wafer test fixture are provided, especially the Fabry-Perot Etalon of the bottom-emitting VCSEL can be measured. When the Fabry-Perot Etalon of the bottom-emitting VCSEL is measured by a measurement apparatus, a light of the test light source of the measurement apparatus is incident from the substrate surface of the VCSEL epitaxial wafer such that the Fabry-Perot Etalon of the bottom-emitting VCSEL is acquired. Through the VCSEL epitaxial wafer test fixture, the bottom-emitting VCSEL can be directly measured by the existing measurement apparatus such that there is no need to change the optical design of the measurement apparatus, and it can prevent the VCSEL epitaxial wafer from being scratched or contaminated.

公开(公告)号：US20210217881A1

公开(公告)日：2021-07-15

申请号：US17148709

申请日：2021-01-14

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Kai-Yu Chen

IPC: H01L29/737 ,  H01L29/205 ,  H01L29/08 ,  H01L23/66 ,  H03F3/21 ,  H03F3/19

Abstract: Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a InGaP layer or a wide bandgap layer. The bandgap of the InGaP layer is greater than 1.86 eV.

公开(公告)号：US20210075185A1

公开(公告)日：2021-03-11

申请号：US17013965

申请日：2020-09-08

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Van-Truong Dai

IPC: H01S5/00 ,  G01J3/45 ,  G01N21/55 ,  H01S5/183

Abstract: A measurement method for a vertical cavity surface emitting laser diode (VCSEL) and an epitaxial wafer test fixture are provided, especially the Fabry-Perot Etalon of the bottom-emitting VCSEL can be measured. When the Fabry-Perot Etalon of the bottom-emitting VCSEL is measured by a measurement apparatus, a light of the test light source of the measurement apparatus is incident from the substrate surface of the VCSEL epitaxial wafer such that the Fabry-Perot Etalon of the bottom-emitting VCSEL is acquired. Through the VCSEL epitaxial wafer test fixture, the bottom-emitting VCSEL can be directly measured by the existing measurement apparatus such that there is no need to change the optical design of the measurement apparatus, and it can prevent the VCSEL epitaxial wafer from being scratched or contaminated.

公开(公告)号：US12295152B2

公开(公告)日：2025-05-06

申请号：US18438442

申请日：2024-02-10

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Kai-Yu Chen

IPC: H10D10/80 ,  H01L23/66 ,  H03F3/19 ,  H03F3/21 ,  H10D62/13 ,  H10D62/824

Abstract: Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a substrate, a sub-collector layer, collector layer, a base layer, and an emitter layer. The collector layer includes a InGaP layer or a wide bandgap layer. The collector layer includes III-V semiconductor material. The bandgap of the wide bandgap layer is greater than that of GaAs.

公开(公告)号：US11799011B2

公开(公告)日：2023-10-24

申请号：US17715140

申请日：2022-04-07

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Van-Truong Dai

IPC: H01L29/45 ,  H01L29/737 ,  H01L31/103 ,  H01S5/042 ,  H01S5/02 ,  H01L27/144 ,  H01S5/183

CPC classification number: H01L29/452 ,  H01L27/1443 ,  H01L29/7371 ,  H01L31/1035 ,  H01S5/0206 ,  H01S5/04256 ,  H01S5/183

Abstract: Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

公开(公告)号：US20230116144A1

公开(公告)日：2023-04-13

申请号：US17965462

申请日：2022-10-13

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Van-Truoung Dai ,  Yu-Chung Chin ,  Chao-Hsing Huang ,  Van-Chien Nguyen

IPC: H01S5/183 ,  H01S5/042

Abstract: Provided is a vertical-cavity surface-emitting semiconductor laser diode, including a substrate and an epitaxial stack structure disposed on the substrate. The epitaxial stack structure includes an active region, a current confinement layer and a mode filter layer. The mode filter layer includes an optical aperture, and the mode filter layer is able to be oxidized. Accordingly, the optical aperture of the mode filter layer is formed by oxidizing the mode filter layer.

公开(公告)号：US20220328645A1

公开(公告)日：2022-10-13

申请号：US17715140

申请日：2022-04-07

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Van-Truong Dai

IPC: H01L29/45 ,  H01L29/737 ,  H01L31/103 ,  H01L27/144 ,  H01S5/042 ,  H01S5/02

Abstract: Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

公开(公告)号：US20210226045A1

公开(公告)日：2021-07-22

申请号：US17155286

申请日：2021-01-22

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Min-Nan Tseng ,  Kai-Yu Chen

IPC: H01L29/737 ,  H01L29/205

Abstract: Provided is a heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a bandgap graded. A quasi-electric field generated by the bandgap graded will enable electrons in the bandgap graded layer to be accelerated.

公开(公告)号：US10818781B2

公开(公告)日：2020-10-27

申请号：US16796018

申请日：2020-02-20

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Chao-Hsing Huang ,  Yu-Chung Chin ,  Min-Nan Tseng ,  Kai-Yu Chen

IPC: H01L29/737 ,  H01L29/08 ,  H01L29/205 ,  H01L29/10

Abstract: Provided is a heterojunction bipolar transistor (HBT) structure with a bandgap graded hole barrier layer, including: a sub-collector layer including an N-type group III-V semiconductor on a substrate, a collector layer on the sub-collector layer and including a group III-V semiconductor, a hole barrier layer on the collector layer, a base layer on the hole barrier layer and including a P-type group III-V semiconductor, an emitter layer on the base layer and including an N-type group III-V semiconductor, an emitter cap layer on the emitter layer and including an N-type group III-V semiconductor, and an ohmic contact layer on the emitter cap layer and including an N-type group III-V semiconductor. Bandgaps of the hole barrier layer at least include a gradually increasing bandgap from the base layer towards the collector layer and a largest bandgap of the hole barrier layer is greater than bandgap of the base layer.

公开(公告)号：US20190115458A1

公开(公告)日：2019-04-18

申请号：US16161185

申请日：2018-10-16

Applicant: VISUAL PHOTONICS EPITAXY CO., LTD.

Inventor： Yu-Chung Chin ,  Chao-Hsing Huang ,  Min-Nan Tseng ,  Kai-Yu Chen

IPC: H01L29/737 ,  H01L29/10 ,  H01L29/08 ,  H01L29/205

Abstract: The disclosure provides an HBT structure with bandgap graded hole barrier layer, comprising: a sub-collector layer, a collector layer, a hole barrier layer, a base layer, an emitter layer, an emitter cap layer, and an ohmic contact layer, all stacked sequentially on a substrate; with the hole barrier layer formed of at least one of AlGaAs, AlGaAsN, AlGaAsP, AlGaAsSb, and InAlGaAs, Aluminum composition being less than 22%, and In, N, P, and Sb compositions being respectively less than or equal to 10%; wherein bandgaps of the hole barrier layer at least comprising a gradually increasing bandgap from the base layer towards the collector layer and the largest bandgap of the hole barrier layer being greater than bandgaps of the base layer and the collector layer. The present invention can effectively enhance the overall device performance.