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公开(公告)号：US20110147342A1
公开(公告)日：2011-06-23
申请号：US12815155
申请日：2010-06-14
Applicant: Shu-Sheng Chiang , Tsung-Yuan Chen , Wei-Ming Cheng
Inventor： Shu-Sheng Chiang , Tsung-Yuan Chen , Wei-Ming Cheng
Abstract: A method for fabricating a wiring structure of a wiring board is provided. First, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, an intaglio pattern exposing the insulation layer is formed on an outer surface of the film. The intaglio pattern is formed by removing a portion of the insulation layer and a portion of the film. Next, an activated layer is formed on the outer surface and in the intaglio pattern. The activated layer completely covers the outer surface and all surfaces of the intaglio pattern. Then, the film and the activated layer on the outer surface are removed, and the activated layer in the intaglio pattern is remained. After the film and the activated layer on the outer surface are removed, a conductive material is formed in the intaglio pattern by chemical deposition method.
Abstract translation: 提供一种制造布线板的布线结构的方法。 首先，提供包括绝缘层和设置在绝缘层上的膜的衬底。 接下来，在膜的外表面上形成露出绝缘层的凹版图案。 通过去除绝缘层的一部分和膜的一部分来形成凹版图案。 接下来，在外表面和凹版图案中形成活化层。 活化层完全覆盖凹版图案的外表面和所有表面。 然后，去除外表面上的膜和活化层，并保留凹版图案中的活化层。 在去除外表面上的膜和活化层之后，通过化学沉积法在凹版图案中形成导电材料。
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Patent Agency Ranking
公开(公告)号：US20110094778A1
公开(公告)日：2011-04-28
申请号：US12606192
申请日：2009-10-27
Applicant: Cheng-Po Yu , Chi-Min Chang , Wei-Ming Cheng
Inventor： Cheng-Po Yu , Chi-Min Chang , Wei-Ming Cheng
CPC classification number: H05K3/185 , H05K3/0032 , H05K3/107 , H05K3/465 , H05K3/4661 , H05K2201/0236
Abstract: A method for fabricating a circuit board is provided. A non-conductive material layer is provided on a core substrate, wherein the non-conductive material layer comprises a dielectric material and catalytic particles. A recessed circuit structure is then formed in the non-conductive material layer with a laser beam. Simultaneously, the catalytic particles in the recessed circuit structure are activated with aid of the laser. A buried conductive structure is then formed in the recessed circuit structure by chemical copper deposition methods.
Abstract translation: 提供一种制造电路板的方法。 非导电材料层设置在芯基板上，其中非导电材料层包括电介质材料和催化颗粒。 然后在非导电材料层中用激光束形成凹陷的电路结构。 同时，凹陷电路结构中的催化颗粒借助于激光器被激活。 然后通过化学铜沉积方法在凹陷电路结构中形成掩埋导电结构。
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公开(公告)号：US08191248B2
公开(公告)日：2012-06-05
申请号：US12211816
申请日：2008-09-17
Applicant: Yi-Chun Liu , Wei-Ming Cheng , Tsung-Yuan Chen , Shu-Sheng Chiang
Inventor： Yi-Chun Liu , Wei-Ming Cheng , Tsung-Yuan Chen , Shu-Sheng Chiang
IPC: H01K3/10
CPC classification number: H05K3/107 , H05K3/0032 , H05K3/0055 , H05K3/184 , H05K3/426 , H05K2201/0236 , H05K2203/0571 , H05K2203/1388 , Y10T29/49117 , Y10T29/49144 , Y10T29/49155 , Y10T29/49165
Abstract: An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.
Abstract translation: 提供电路板的嵌入式结构。 本发明的嵌入式结构包括电介质层，设置在电介质层中的焊盘开口以及布置在焊盘开口和电介质层中的通孔，其中电介质层的外表面具有基本均匀的表面。
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公开(公告)号：US08132321B2
公开(公告)日：2012-03-13
申请号：US12190602
申请日：2008-08-13
Applicant: Yi-Chun Liu , Wei-Ming Cheng , Tsung-Yuan Chen , Shu-Sheng Chiang
Inventor： Yi-Chun Liu , Wei-Ming Cheng , Tsung-Yuan Chen , Shu-Sheng Chiang
IPC: H01K3/10
CPC classification number: H05K3/465 , H05K3/0032 , H05K3/0035 , H05K3/0055 , H05K3/383 , H05K3/421 , H05K3/4661 , H05K2203/0796 , H05K2203/1383
Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.
Abstract translation: 提供电路板的嵌入式结构。 所述嵌入式结构包括基板，设置在所述基板上并选择性地暴露所述基板的第一图案化导电层，覆盖所述第一图案化导电层和所述基板的第一介电层，设置在所述第一介电层中的焊盘开口， 在所述焊盘开口中并暴露所述第一图案化导电层，其中所述第一介电层的外表面具有基本上均匀的表面。
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公开(公告)号：US20110147339A1
公开(公告)日：2011-06-23
申请号：US12793560
申请日：2010-06-03
Applicant: Shu-Sheng Chiang , Tsung-Yuan Chen , Wei-Ming Cheng
Inventor： Shu-Sheng Chiang , Tsung-Yuan Chen , Wei-Ming Cheng
CPC classification number: B32B38/04 , B32B2311/00 , B32B2457/08 , C23C18/1608 , C23C18/1653 , C23C18/1831 , C23C18/31 , H05K3/107
Abstract: A method for manufacturing a wiring structure of a wiring board is provided. In the method, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, a barrier layer completely covering the film is formed. Next, an intaglio pattern partially exposing the insulation layer is formed on an outer surface of the barrier layer. Next, an activated layer is formed on the outer surface and in the intaglio pattern. Then, the activated layer on the outer surface is removed, and the activated layer in the intaglio pattern is remained. After the activated layer on the outer surface is removed, a conductive material is formed in the intaglio pattern by using a chemical deposition method. After forming the conductive material, the barrier layer and the film are removed.
Abstract translation: 提供一种用于制造布线板的布线结构的方法。 在该方法中，提供了包括绝缘层和设置在绝缘层上的膜的衬底。 接下来，形成完全覆盖该膜的阻挡层。 接下来，在阻挡层的外表面上形成部分地露出绝缘层的凹版图案。 接下来，在外表面和凹版图案中形成活化层。 然后，去除外表面上的活化层，并保留凹版图案中的活化层。 在去除外表面上的活化层之后，通过使用化学沉积方法在凹版图案中形成导电材料。 在形成导电材料之后，去除阻挡层和膜。
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公开(公告)号：US20100038124A1
公开(公告)日：2010-02-18
申请号：US12190602
申请日：2008-08-13
Applicant: Yi-Chun Liu , Wei-Ming Cheng , Tsung-Yuan Chen , Shu-Sheng Chiang
Inventor： Yi-Chun Liu , Wei-Ming Cheng , Tsung-Yuan Chen , Shu-Sheng Chiang
CPC classification number: H05K3/465 , H05K3/0032 , H05K3/0035 , H05K3/0055 , H05K3/383 , H05K3/421 , H05K3/4661 , H05K2203/0796 , H05K2203/1383
Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.
Abstract translation: 提供电路板的嵌入式结构。 所述嵌入式结构包括基板，设置在所述基板上并选择性地暴露所述基板的第一图案化导电层，覆盖所述第一图案化导电层和所述基板的第一介电层，设置在所述第一介电层中的焊盘开口， 在所述焊盘开口中并暴露所述第一图案化导电层，其中所述第一介电层的外表面具有基本上均匀的表面。
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