Abstract:
Embodiments of the present invention address kT/C noise, sampled high frequency operational amplifier noise, and charge injection errors sampled on switching capacitors and introduced due to internal switching. Correlated double sampling compensates for DC offset and low frequency operational amplifier noise, and the use of fake integration and a capacitor divider eliminate or significantly reduce kT/C noise, sampled high frequency operational amplifier noise, and charge injection errors.
Abstract:
Methods and apparatus for improved current-to-voltage integrators reducing charge injection and kT/C errors from capacitor switching and intrinsic operational amplifier noise (i.e., offset, 1/f noise, thermal noise) during the reset cycle of the integrator, simultaneously reducing demands on the reference voltage source, using correlated double sampling to compensate for DC offset and low frequency op-amp noises, and “fake” integration and a capacitor divider to eliminate or significantly reduce kT/C noise and charge injection.
Abstract:
Systems and methods for the communication and recovery of supplementary data encoded in the primary information transmitted from a source to a receiver for both audio and television transmissions. The method includes modulating a carrier signal with the supplementary data using a spread spectrum approach and demodulating the carrier signal to recover the embedded supplementary data.
Abstract:
Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
Abstract:
Methods and apparatus for the conversion of analog signals into digital signals using second order or higher sigma-delta modulators in pipelined or cyclic architectures.
Abstract:
A direct conversion RF transceiver (2) and ASIC having an on-chip voltage controlled oscillator operating frequency that is half of the transmitter (4) and/or receiver (6) operating frequency, the VCO (20) being comprised of a plurality of synchronized LC oscillators (92A-D) introducing precise phase shifts that eliminate frequency ambiguity. The transceiver incorporates several low power circuits, including on-chip a power converter switchably coupling a capacitor (42) to a power supply (45) and to an electrical load (40), multiple switchable low dropout regulators (60A, B) each coupled to alternate power supplies (62,64) and having electrical components (67A, B) for setting the bandwidth of the respective low dropout regulator. The transceiver also includes a FSK digital modulator utilizing a circuit-implemented polynomial piecewise approximation (71) of a raised cosine signal.
Abstract:
Methods of electroless plating metal on a dielectric material includes dipping the dielectric in a solution containing attractive catalytic metal particles and a metal salt solution. A thicker metallic layer can be deposited on top of the resulting layer by electroplating. Electrical circuits and multichip modules including such circuits can be formed having one or more dielectric layers comprised of latex and one or more layers of conductive leads, one or more dielectric layers comprised of a flexible dielectric material, and one or more layers of electrically conductive material patterned to interconnect such ICs. Frames that hold ICs against a substrate may be employed to planarize their top surfaces against the substrate, as well as standard photolithographic techniques in creating conductive paths on the dielectric material between the ICs.
Abstract:
Circuitry for transmitting signals through a transformer has an output transistor and circuitry which provides a controlled current to and from the output transistor's gate, so as to charge and discharge the gate's parasitic capacitance and increase and decrease the transistor's output current in a controlled manner. Feedback can be used to sense an output signal created by the transistor and turn off current to or from the transistor's gate when the output signal has reached a desired level. The output signal can be the voltage differential produced across an output transformer, and, where the output transformer is center-tapped, it can be the voltage differential across both halves of the center tapped winding.
Abstract:
Method of forming a ferromagnetic layer on at least one surface of a dielectric material that may be serve as an inductive core on a printed circuit board or a multichip module. Conductive leads can form two separate coils around the core to form a transformer, and a planar conducing sheet can be placed on or between one or more of the dielectric layers as magnetic shielding. The core can be formed at least in part by electroless plating, and electroplating can be used to add a thicker layer of less conductive ferromagnetic material. Ferromagnetic layers are formed by dipping the dielectric surface in a solution containing catalytic metal particles having a slight dipole, and placing the surface in a metal salt to cause a layer containing metal to be electrolessly plated upon the dielectric. Surface roughening techniques can be used before the dipping to help attract the catalytic particles.