公开(公告)号：US20080170670A1

公开(公告)日：2008-07-17

申请号：US11882473

申请日：2007-08-02

Applicant: Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara ,  Sanjeev Sathe

Inventor： Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara ,  Sanjeev Sathe

IPC: H01J35/12

CPC classification number: G01N23/046 ,  G01N2223/419

Abstract: A method of inspecting articles using an imaging inspection apparatus which utilizes a plurality of individual imaging devices for directing beams onto the articles having objects therein to detect the objects based on established criteria. The method involves the enhanced cooling of the heat-generating imaging devices in which a fan directs cooling fluid onto a plurality of deflectors which in turn direct said fluid onto selected ones of said imaging devices.

Abstract translation: 使用成像检查装置检查制品的方法，所述成像检查装置利用多个单独的成像装置将光束引导到其上具有物体的物品上，以根据建立的标准检测物体。 该方法涉及对发热成像装置进行增强的冷却，其中风扇将冷却流体引导到多个偏转器上，反过来将导流体引导到所选择的成像装置上。

公开(公告)号：US07261466B2

公开(公告)日：2007-08-28

申请号：US11141349

申请日：2005-06-01

Applicant: Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara, Jr. ,  Sanjeev Sathe

Inventor： Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara, Jr. ,  Sanjeev Sathe

IPC: H01J35/12 ,  G01N23/04

CPC classification number: G01N23/046 ,  G01N2223/419

Abstract: An imaging inspection apparatus which utilizes a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) for directing beams onto articles having objects therein to detect the objects based on established criteria. The apparatus utilizes a cooling structure for directing cooling fluid (e.g., air) toward and over the devices, the structure including a fan for directing cooling fluid in a first direction and a plurality of fluid deflectors for deflecting at least part of the fluid toward respective ones of the devices.

公开(公告)号：US06887651B2

公开(公告)日：2005-05-03

申请号：US10304143

申请日：2002-11-25

Applicant: Ashwinkumar C. Bhatt ,  Brant S. Blomberg ,  Ross W. Keesler ,  Michael V. Longo ,  Eboney J. N. Smith

Inventor： Ashwinkumar C. Bhatt ,  Brant S. Blomberg ,  Ross W. Keesler ,  Michael V. Longo ,  Eboney J. N. Smith

IPC: G03F7/00 ,  G03F7/16 ,  H05K3/00 ,  H05K3/06 ,  G03F7/26

CPC classification number: H05K3/064 ,  G03F7/0035 ,  G03F7/164 ,  H05K3/0094 ,  H05K2203/0577 ,  H05K2203/135 ,  H05K2203/1394

Abstract: A hybrid photolithography process for printed circuit board patterning combines two types of photoresist applications to achieve superior protection of printed circuit board (PCB) ‘plated through holes’ (PTH). In a first step, electro-deposited (ED) photoresist (also known as “ED resist”) is applied to a fully copper plated PCB including the ‘plated through holes’ to protect the outer layers and the ‘plated through holes’ from copper etchant solution. In a second step, the electro-deposited photoresist is imaged (exposed) and patterned (developed). In a third step, after developing the circuit image, a layer of Dry Film resist is applied to the panel of the PCB on top of the developed electro-deposited (ED) photoresist. This Dry Film resist layer will ‘tent’ the plated through holes by adding an extra layer of protection to the plated through holes. In a fourth step, the dry film resist is then exposed and developed. At this point, the PCB is etched as normal and all subsequent processing remains unchanged.

Abstract translation: 用于印刷电路板图案的混合光刻工艺组合了两种类型的光致抗蚀剂应用，以实现印刷电路板（PCB）“电镀通孔”（PTH）的优异保护。 在第一步中，将电沉积（ED）光致抗蚀剂（也称为“ED抗蚀剂”）施加到包括“电镀通孔”的完全镀铜的PCB上，以保护外层和“电镀通孔”与铜 蚀刻液 在第二步中，将电沉积的光致抗蚀剂成像（曝光）并图案化（显影）。 在第三步骤中，在显影电路图像之后，将一层干膜抗蚀剂施加到显影的电沉积（ED）光致抗蚀剂顶部的PCB板上。 该干膜抗蚀剂层将通过向电镀通孔添加额外的保护层来“掩盖”电镀通孔。 在第四步骤中，然后将干膜抗蚀剂曝光和显影。 此时，PCB正常蚀刻，所有后续处理保持不变。

公开(公告)号：US06426565B1

公开(公告)日：2002-07-30

申请号：US09533402

申请日：2000-03-22

Applicant: Ashwinkumar C. Bhatt ,  Paul E. Logan ,  Amarjit S. Rai

Inventor： Ashwinkumar C. Bhatt ,  Paul E. Logan ,  Amarjit S. Rai

IPC: H01L2343

CPC classification number: H01L24/32 ,  H01L23/04 ,  H01L23/13 ,  H01L23/145 ,  H01L23/3121 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L2224/27013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83051 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15157 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/1579 ,  H01L2924/15798 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/00 ,  H01L2924/00012

Abstract: An electronic package and method of making the electronic package is provided. An opening in the substrate of the electronic package is formed to substantially prevent adhesive which can bleed from under an electronic device from contacting conductive pads on the substrate. An electrical coupling is formed between the package's electronic device and conductive pads.

Abstract translation: 提供电子封装和制造电子封装的方法。 形成电子封装的衬底中的开口，以基本上防止可能从电子器件下方渗出的粘合剂不接触衬底上的导电焊盘。 在封装的电子器件和导电焊盘之间形成电耦合。

公开(公告)号：US6162365A

公开(公告)日：2000-12-19

申请号：US34936

申请日：1998-03-04

Applicant: Ashwinkumar C. Bhatt ,  John Gerard Gaudiello

Inventor： Ashwinkumar C. Bhatt ,  John Gerard Gaudiello

IPC: H05K3/06 ,  H05K3/10 ,  H05K3/24 ,  H05K3/42 ,  H01B13/00 ,  B05D5/12 ,  C25D5/02 ,  G03C5/00 ,  H01K3/10

CPC classification number: H05K3/244 ,  H05K3/062 ,  H05K3/108 ,  H05K3/427 ,  Y10T29/49165

Abstract: A process for making a printed circuit board is provided. The process employs a noble metal as an etch mask for subtractive circuitization and as a seed layer for secondary finishing. In a preferred embodiment of the invention, a dielectric is covered by a conductive layer of metal such as copper, a patterned photoresist is applied, additional copper is deposited on areas not covered by the photoresist, and a palladium etch mask/seed layer is deposited on the copper. The palladium layer remains sufficiently active for deposition of nickel or gold on the circuitry for purposes such as wire bonding.

Abstract translation: 提供了制造印刷电路板的工艺。 该方法采用贵金属作为减法电路的蚀刻掩模和用于二次精加工的籽晶层。 在本发明的优选实施例中，电介质被诸如铜的金属导电层覆盖，施加图案化的光致抗蚀剂，另外的铜沉积在未被光致抗蚀剂覆盖的区域上，并且钯蚀刻掩模/晶种层被沉积 在铜上。 钯层保持足够的活性以将镍或金沉积在电路上用于诸如引线键合的目的。