公开(公告)号：US10041166B2

公开(公告)日：2018-08-07

申请号：US15795768

申请日：2017-10-27

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/455 ,  H01L21/285 ,  H01L21/768

CPC classification number: C23C16/02 ,  C23C16/06 ,  C23C16/345 ,  C23C16/4404 ,  C23C16/4405 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/56 ,  H01L21/28562 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/7685 ,  H01L21/76883

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US09947582B1

公开(公告)日：2018-04-17

申请号：US15612962

申请日：2017-06-02

Applicant: ASM IP HOLDING B.V.

Inventor： Aurélie Kuroda ,  Shang Chen ,  Takahiro Onuma ,  Dai Ishikawa

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L21/76888 ,  H01L21/76849 ,  H01L23/53238

Abstract: Processes are provided herein for protecting metal thin films from oxidation when exposed to an oxidizing environment, such as the ambient atmosphere. The processes may comprise a protective treatment including exposing the metal thin film to a silicon-containing precursor at a temperature of about 200° C. or less in order to selectively adsorb a silicon-containing protective layer on the metal thin film. The silicon-containing protective layer may reduce or substantially prevent the underlying metal thin film from oxidation.

公开(公告)号：US09905416B2

公开(公告)日：2018-02-27

申请号：US15414485

申请日：2017-01-24

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02 ,  H01L21/8234

CPC classification number: H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/823431

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US09824881B2

公开(公告)日：2017-11-21

申请号：US13830084

申请日：2013-03-14

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore

IPC: H01L21/02 ,  C23C16/34 ,  C23C16/455 ,  H01L29/66

CPC classification number: H01L21/0217 ,  C23C16/345 ,  C23C16/45553 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L29/66795

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US09805974B1

公开(公告)日：2017-10-31

申请号：US15177198

申请日：2016-06-08

Applicant: ASM IP Holding B.V.

Inventor： Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/532

CPC classification number: H01L21/7685 ,  C23C16/04 ,  C23C16/08 ,  C23C16/4404 ,  C23C16/45523 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/32055 ,  H01L21/76823 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/53228 ,  H01L23/53266

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US09576792B2

公开(公告)日：2017-02-21

申请号：US14855261

申请日：2015-09-15

Applicant: ASM IP Holding B.V.

Inventor： Shang Chen ,  Viljami Pore ,  Ryoko Yamada ,  Antti Juhani Niskanen

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/34 ,  C23C16/455

CPC classification number: H01L21/0228 ,  C23C16/045 ,  C23C16/345 ,  C23C16/45536 ,  C23C16/45553 ,  H01L21/0217 ,  H01L21/02274

Abstract: Methods and precursors for forming silicon nitride films are provided. In some embodiments, silicon nitride can be deposited by atomic layer deposition (ALD), such as plasma enhanced ALD. In some embodiments, deposited silicon nitride can be treated with a plasma treatment. The plasma treatment can be a nitrogen plasma treatment. In some embodiments the silicon precursors for depositing the silicon nitride comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%). In some embodiments, a method for depositing silicon nitride films comprises a multi-step plasma treatment.

Abstract translation: 提供了形成氮化硅膜的方法和前体。 在一些实施例中，氮化硅可以通过原子层沉积（ALD）沉积，例如等离子体增强的ALD。 在一些实施例中，沉积的氮化硅可以用等离子体处理。 等离子体处理可以是氮等离子体处理。 在一些实施方案中，用于沉积氮化硅的硅前体包含碘配体。 当沉积到诸如FinFETS或其它类型的多栅极FET的三维结构上时，氮化硅膜可以具有相对均匀的垂直和水平部分的蚀刻速率。 在一些实施方案中，本公开的各种氮化硅膜具有小于具有稀释HF（0.5％）的热氧化物去除速率的一半的蚀刻速率。 在一些实施例中，沉积氮化硅膜的方法包括多步等离子体处理。

公开(公告)号：US20140273477A1

公开(公告)日：2014-09-18

申请号：US14167904

申请日：2014-01-29

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02

CPC classification number: H01L21/0217 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31111 ,  H01L21/823431

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US11587783B2

公开(公告)日：2023-02-21

申请号：US17101428

申请日：2020-11-23

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/8234

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US11069522B2

公开(公告)日：2021-07-20

申请号：US16540349

申请日：2019-08-14

Applicant: ASM IP HOLDING B.V.

Inventor： Antti J. Niskanen ,  Shang Chen ,  Viljami Pore ,  Atsuki Fukazawa ,  Hideaki Fukuda ,  Suvi P. Haukka

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/8234

Abstract: Methods and precursors for depositing silicon nitride films by atomic layer deposition (ALD) are provided. In some embodiments the silicon precursors comprise an iodine ligand. The silicon nitride films may have a relatively uniform etch rate for both vertical and the horizontal portions when deposited onto three-dimensional structures such as FinFETS or other types of multiple gate FETs. In some embodiments, various silicon nitride films of the present disclosure have an etch rate of less than half the thermal oxide removal rate with diluted HF (0.5%).

公开(公告)号：US20200291511A1

公开(公告)日：2020-09-17

申请号：US16676017

申请日：2019-11-06

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/06 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  C23C16/56 ,  H01L21/768 ,  H01L21/285

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.