公开(公告)号：US11257776B2

公开(公告)日：2022-02-22

申请号：US16573672

申请日：2019-09-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yung-Sheng Lin ,  Chin-Li Kao ,  Hsu-Nan Fang

IPC: H01L25/065 ,  H01L25/16 ,  H01L25/00 ,  H01L25/18 ,  H01L23/00

Abstract: A semiconductor package structure includes a semiconductor die surface having a narrower pitch region and a wider pitch region adjacent to the narrower pitch region, a plurality of first type conductive pillars in the narrower pitch region, each of the first type conductive pillars having a copper-copper interface, and a plurality of second type conductive pillars in the wider pitch region, each of the second type conductive pillars having a copper-solder interface. A method for manufacturing the semiconductor package structure described herein is also disclosed.

公开(公告)号：US10943843B2

公开(公告)日：2021-03-09

申请号：US16241589

申请日：2019-01-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsiu-Chi Liu ,  Hsu-Nan Fang

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/538 ,  H01L23/00 ,  H01L21/768 ,  H01L21/56 ,  H01L23/498

Abstract: A semiconductor package structure includes a conductive trace layer, a semiconductor die over the conductive trace layer, a structure enhancement layer surrounding the semiconductor die, and an encapsulant covering the semiconductor die and the structure enhancement layer. The structure enhancement layer coincides with a mass center plane of the semiconductor package structure. The mass center plane is parallel to a top surface of the semiconductor die. A method for manufacturing the semiconductor package structure is also provided.

公开(公告)号：US11502024B2

公开(公告)日：2022-11-15

申请号：US16748566

申请日：2020-01-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang

IPC: H01L23/48 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a first semiconductor element, a first redistribution layer, a second redistribution layer, and a conductive via. The first semiconductor element has a first active surface and a first back surface opposite to the first active surface. The first redistribution layer is disposed adjacent to the first back surface of the first semiconductor element. The second redistribution layer is disposed adjacent to the first active surface of the first semiconductor element. The conductive via is disposed between the first redistribution layer and the second redistribution layer, where the conductive via inclines inwardly from the second redistribution layer to the first redistribution layer.

公开(公告)号：US11316274B2

公开(公告)日：2022-04-26

申请号：US16432662

申请日：2019-06-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Cheng-Nan Lin ,  Hsu-Nan Fang

IPC: H01Q1/38 ,  H01Q13/18 ,  H01L23/31 ,  H01L23/66 ,  H01L23/29 ,  H01L23/498 ,  H01L21/56 ,  H01L23/13

Abstract: A semiconductor device package includes a substrate, a first molding compound and antenna layer. The substrate has a first surface and a second surface opposite to the first surface. The first molding compound is disposed on the first surface of the substrate. The antenna layer is disposed on the first molding compound. The substrate, the first molding compound and the antenna layer define a cavity.

公开(公告)号：US11282772B2

公开(公告)日：2022-03-22

申请号：US16676280

申请日：2019-11-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang

IPC: H01L23/498 ,  H01L23/29 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/463 ,  H01L21/48 ,  H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L21/683 ,  H01L23/14 ,  H01L23/433

Abstract: A package structure includes at least one electronic device, a protection layer and an encapsulant. The electronic device has a first surface and includes a plurality of bumps disposed adjacent to the first surface thereof. Each of the bumps has a first surface. The protection layer covers the bumps and the first surface of the electronic device, and has a first surface. The encapsulant covers the protection layer and at least a portion of the electronic device, and has a first surface. The first surfaces of the bumps, the first surface of the protection layer and the first surface of the encapsulant are substantially coplanar with each other.

公开(公告)号：US11217498B2

公开(公告)日：2022-01-04

申请号：US16671988

申请日：2019-11-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chien-Ching Chen ,  Chen Yuan Weng

IPC: H01L23/31 ,  H01L23/29 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor package includes a semiconductor die having a first surface and a second surface opposite to the first surface, a conductive wiring layer stacked with the semiconductor die and proximal to the first surface, an encapsulant encapsulating the semiconductor die and stacked with the conductive wiring layer, and a replacement structure exposing from the encapsulant and being free of fillers. A method for manufacturing the semiconductor package is also disclosed in the present disclosure.

公开(公告)号：US10797022B2

公开(公告)日：2020-10-06

申请号：US16152270

申请日：2018-10-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chun-Jun Zhuang ,  Yung I. Yeh ,  Ming-Chiang Lee

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L21/683 ,  H01L23/367 ,  H01L21/48 ,  H01L23/498

Abstract: A semiconductor device package includes a first redistribution layer (RDL), a first die, a second die, a second RDL and an encapsulant. The first die is disposed on the first RDL and is electrically connected to the first RDL. The first die has a first electrical contact. The second die is disposed on the first RDL and is electrically connected to the first RDL. The second die has a first electrical contact. The second RDL is surrounded by the first RDL. The second RDL has a first electrical contact electrically connected to the first electrical contact of the first die and a second electrical contact electrically connected to the first electrical contact of the second die. A size of the first electrical contact of the second RDL is greater than a size of the second electrical contact of the second RDL.

公开(公告)号：US10797019B2

公开(公告)日：2020-10-06

申请号：US15683697

申请日：2017-08-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chun-Jun Zhuang

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/538 ,  H01L25/065 ,  H01L21/56 ,  H01L23/29 ,  H01L23/31 ,  H01L25/00

Abstract: A semiconductor package structure includes at least one semiconductor die, at least one conductive pillar, an encapsulant and a circuit structure. The semiconductor die has an active surface. The conductive pillar is disposed adjacent to the active surface of the semiconductor die. The encapsulant covers the semiconductor die and the conductive pillar. The encapsulant defines at least one groove adjacent to and surrounding the conductive pillar. The circuit structure is electrically connected to the conductive pillar.

公开(公告)号：US10593630B2

公开(公告)日：2020-03-17

申请号：US15978070

申请日：2018-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chun-Jun Zhuang ,  Yung I. Yeh

IPC: H01L21/66 ,  H01L23/552 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

Abstract: A semiconductor package includes a semiconductor die, a plurality of conductive bumps, a shielding layer, an encapsulant and a redistribution layer. The semiconductor die has an active surface, a backside surface and a lateral surface. The conductive bumps are disposed on the active surface of the semiconductor die. The shielding layer is disposed on the lateral surface of the semiconductor die. The encapsulant covers the shielding layer, and has a first surface and a second surface opposite to the first surface. The redistribution layer is disposed on the first surface of the encapsulant and electrically connected to the semiconductor die through the conductive bumps. The shielding layer is electrically connected to the redistribution layer.

公开(公告)号：US10475775B2

公开(公告)日：2019-11-12

申请号：US15680063

申请日：2017-08-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsu-Nan Fang ,  Chun-Jun Zhuang

IPC: H01L23/29 ,  H01L25/16 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00

Abstract: A semiconductor package device comprises a circuit layer, an electronic component disposed on the circuit layer, a package element and a first encapsulant. The package element is disposed on the circuit layer. The package element includes at least two electrical contacts electrically connected to the circuit layer. The first encapsulant is disposed on the circuit layer. The first encapsulant encapsulates the electronic component and the package element and exposes the electrical contacts of the package element.