公开(公告)号：US20240412682A1

公开(公告)日：2024-12-12

申请号：US18273989

申请日：2022-07-07

Applicant: BOE Technology Group Co., Ltd.

Inventor： Weixing LIU ,  Kuanjun PENG ,  Bin QIN ,  Kai GUO ,  Tieshi WANG ,  Fangzhen ZHANG

IPC: G09G3/32 ,  H01L25/075 ,  H01L25/16 ,  H01L33/62

Abstract: A display substrate (910), comprising a plurality of pixel units (P11, P12, P21, P22) and at least one compensation circuit. At least one pixel unit (P11, P12, P21, P22) comprises: a main light-emitting unit and an auxiliary light-emitting unit; and the at least one compensation circuit is connected to the auxiliary light-emitting unit of the at least one pixel unit (P11, P12, P21, P22). The at least one compensation circuit is configured to measure the brightness or temperature of the at least one pixel unit (P11, P12, P21, P22) and control the auxiliary light-emitting unit of the at least one pixel unit (P11, P12, P21, P22) to emit light according to a measurement result.

公开(公告)号：US20240249660A1

公开(公告)日：2024-07-25

申请号：US18290792

申请日：2021-11-22

Applicant: Beijing BOE Display Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Jinyu REN ,  Haisheng LIU ,  Kuanjun PENG ,  Fangzhen ZHANG ,  Jinqian WANG ,  Guojing MA ,  Dan WANG ,  Wei WANG ,  Sha FENG

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/2092 ,  G09G2300/0842 ,  G09G2310/0286 ,  G11C19/28

Abstract: The present disclosure provides a shift register unit, a gate driver circuit, and a display device, belonging to the field of display technology, which can solve the problem of unstable threshold voltage and current leakage of thin film transistors in existing shift register units. The shift register unit in the present disclosure includes: an input subcircuit, an output subcircuit, a pull-down control subcircuit, a pull-down subcircuit, a first noise reduction subcircuit, a first auxiliary control subcircuit, and a second auxiliary control subcircuit. The first auxiliary control subcircuit is configured to write the third reference level signal to the pull-down control node when the pull-down node is the first reference level signal, and control the pull-down subcircuit to be closed to control the first noise reduction subcircuit to be open.

公开(公告)号：US20230274696A1

公开(公告)日：2023-08-31

申请号：US18014254

申请日：2021-11-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Weixing LIU ,  Kuanjun PENG ,  Bin QIN ,  Xue DONG ,  Fangzhen ZHANG ,  Wanpeng TENG ,  Tieshi WANG ,  Wanzhi CHEN ,  Kai GUO ,  Chunfang ZHANG

IPC: G09G3/3233 ,  H01L27/15 ,  H01L33/06 ,  H01L33/38

CPC classification number: G09G3/3233 ,  H01L27/156 ,  H01L33/06 ,  H01L33/38 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2310/08 ,  G09G2300/0426 ,  G09G2320/0233

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time.

公开(公告)号：US20230111185A1

公开(公告)日：2023-04-13

申请号：US17769937

申请日：2021-05-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shuang SUN ,  Fangzhen ZHANG ,  Jing NIU ,  Yanan NIU ,  Jintao PENG ,  Lubin SHI

IPC: H10K59/121 ,  H01L27/12 ,  H10K59/131

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a pixel circuit, and the pixel circuit includes a light-emitting element, a driving circuit and a capacitor circuit. The driving circuit is configured to drive the light-emitting element to emit light; a first terminal of the capacitor circuit is electrically connected to a control terminal of the driving circuit, and a second terminal of the capacitor circuit is electrically connected to a data writing-in node; the capacitor circuit includes at least two capacitors connected in parallel with each other.

公开(公告)号：US20170040342A1

公开(公告)日：2017-02-09

申请号：US14911213

申请日：2015-07-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ce NING ,  Mingchao LI ,  Fangzhen ZHANG

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/40 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1259 ,  H01L29/401 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/786 ,  H01L29/7869

Abstract: The present disclosure relates to the field of display technology and provides a method for manufacturing a TFT, the TFT, an array substrate including the TFT, and a display device. The method includes steps of forming a pattern of a gate electrode on a base substrate, forming a gate insulation layer on the base substrate, and forming patterns of a source electrode and a drain electrode arranged above the gate insulation layer. The method further includes forming an antioxidation metal protection layer on a surface or surfaces of the gate electrode, the source electrode and/or the drain electrode.

Abstract translation: 本公开涉及显示技术领域，并且提供了制造TFT，TFT，包括TFT的阵列基板和显示装置的方法。 该方法包括以下步骤：在基底基板上形成栅极电极的图案，在基底基板上形成栅极绝缘层，以及形成设置在栅极绝缘层上方的源电极和漏电极的图案。 该方法还包括在栅电极，源电极和/或漏电极的表面上形成抗氧化金属保护层。

公开(公告)号：US20160329352A1

公开(公告)日：2016-11-10

申请号：US14892067

申请日：2015-04-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhijun LV ,  Ke WANG ,  Jiushi WANG ,  Fangzhen ZHANG

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L21/77 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An array substrate and a fabrication method thereof, and a display device are provided. The array substrate comprises: a thin film transistor (TFT 10) provided on a base substrate (01), a first passivation layer (200) provided on the thin film transistor (TFT 10), and a transparent electrode layer (300) provided on a surface of the first passivation layer (200). The first passivation layer (300) includes: a first sub-thin film layer (210), and a second sub-thin film layer (211) which is provided on a surface of the first sub-thin film layer (210) and in contact with the transparent electrode layer (300); and a film density of the second sub-thin film layer (211) is greater than that of the first sub-thin film layer (210).

Abstract translation: 提供阵列基板及其制造方法以及显示装置。 阵列基板包括：设置在基底基板（01）上的薄膜晶体管（TFT 10），设置在薄膜晶体管（TFT 10）上的第一钝化层）和设置在薄膜晶体管上的透明电极层 第一钝化层（200）的表面。 第一钝化层（300）包括：第一亚薄膜层（210）和设置在第一亚薄膜层（210）的表面上的第二亚薄膜层（211） 与透明电极层（300）接触; 并且第二亚薄膜层（211）的膜密度大于第一亚薄膜层（210）的膜密度。

公开(公告)号：US20160211284A1

公开(公告)日：2016-07-21

申请号：US14347833

申请日：2013-04-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fangzhen ZHANG

IPC: H01L27/12 ,  H01L29/167 ,  H01L21/027 ,  H01L21/306 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1288 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0274 ,  H01L21/265 ,  H01L21/30604 ,  H01L21/32139 ,  H01L29/167 ,  H01L29/66575 ,  H01L29/66757 ,  H01L29/78621

Abstract: Embodiments of the invention provides a method for fabricating an array substrate comprising: forming, on a substrate, at least two semiconductor active islands, first patterns positioned on both sides of each of the semiconductor active islands, second patterns positioned at outer side of a part of the first patterns, and third patterns positioned at outer side of the rest of the first patterns, through a single patterning process; doping a semiconductor at the second patterns for once to form a semiconductor of a first conductivity type; and doping a semiconductor at the third patterns for once to form a semiconductor of a second conductivity type.

Abstract translation: 本发明的实施例提供一种制造阵列衬底的方法，包括：在衬底上形成至少两个半导体活性岛，位于每个半导体活性岛的两侧的第一图案，位于部分的外侧的第二图案 的第一图案和位于其余第一图案的外侧的第三图案通过单个图案化工艺; 以第二图案掺杂半导体一次以形成第一导电类型的半导体; 并且以第三图案掺杂半导体一次以形成第二导电类型的半导体。

公开(公告)号：US20160148954A1

公开(公告)日：2016-05-26

申请号：US14436995

申请日：2014-08-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang SUN ,  Fangzhen ZHANG ,  Jing NIU

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1343 ,  H01L29/786 ,  H01L21/027 ,  H01L21/3213 ,  H01L21/4763 ,  H01L29/66 ,  G02F1/1368 ,  G02F1/1339

CPC classification number: H01L27/1222 ,  G02F1/1339 ,  G02F1/134336 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136231 ,  G02F2001/13685 ,  H01L21/0273 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/6675 ,  H01L29/66969 ,  H01L29/78663 ,  H01L29/78672 ,  H01L29/7869

Abstract: The present invention provides an array substrate and a manufacturing method thereof and a display device. The manufacturing method comprises: forming a pattern including a pixel electrode and a source of a thin film transistor on a base substrate through a single patterning process, the pixel electrode is provided in a layer under a layer in which the source is located; forming a pattern including a drain, an active layer, a gate insulation layer and a gate of the thin film transistor through a single patterning process, the active layer covers the source and the drain, and is separated from the gate through the gate insulation layer; and forming a pattern including a passivation layer, a common electrode and a gate line through a single patterning process, the common electrode is a slit electrode and separated from the active layer and the pixel electrode through the passivation layer.

Abstract translation: 本发明提供一种阵列基板及其制造方法以及显示装置。 该制造方法包括：通过单个图案化工艺在基底基板上形成包括像素电极和薄膜晶体管源的图案，像素电极设置在源所在的层下面的层中; 通过单个图案化工艺形成包括漏极，有源层，栅极绝缘层和薄膜晶体管的栅极的图案，有源层覆盖源极和漏极，并且通过栅极绝缘层与栅极分离 ; 并且通过单一图案化工艺形成包括钝化层，公共电极和栅极线的图案，公共电极是狭缝电极，并且通过钝化层与有源层和像素电极分离。

公开(公告)号：US20150357239A1

公开(公告)日：2015-12-10

申请号：US14513324

申请日：2014-10-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi SHU ,  Zhijun LV ,  Jingxia GU ,  Yue SHI ,  Fangzhen ZHANG ,  Bing SUN ,  Chuanxiang XU

IPC: H01L21/768 ,  H01L21/3205

CPC classification number: H01L21/76892 ,  H01L21/3081 ,  H01L21/32055 ,  H01L23/49877 ,  H01L2924/0002 ,  H05K3/064 ,  H05K2201/0108 ,  H05K2201/0323 ,  H05K2201/10128 ,  H01L2924/00

Abstract: The invention provides a method for patterning a graphene layer and a method for manufacturing a display substrate. The method for patterning a graphene layer comprises: forming an isolation layer on a graphene layer; forming a photoresist layer on the isolation layer; patterning the photoresist layer; etching the isolation layer according to the patterned photoresist layer to form a patterned isolation layer; etching the graphene layer according to the patterned photoresist layer to form a patterned graphene layer; and removing the patterned isolation layer. In the method of the invention, the unfavorable condition of the prior art may be avoided that a graphene film sloughs off or a photoresist remains on a graphene film when a photoresist material is peeled off, and the product yield can be improved in the case that the production cost is controlled.

Abstract translation: 本发明提供一种用于图案化石墨烯层的方法和用于制造显示基板的方法。 图案化石墨烯层的方法包括：在石墨烯层上形成隔离层; 在隔离层上形成光致抗蚀剂层; 图案化光致抗蚀剂层; 根据图案化的光致抗蚀剂层蚀刻隔离层以形成图案化隔离层; 根据图案化的光致抗蚀剂层蚀刻石墨烯层以形成图案化的石墨烯层; 并去除图案化隔离层。 在本发明的方法中，可以避免现有技术的不利条件，当光致抗蚀剂材料被剥离时，石墨烯薄膜脱落或光致抗蚀剂残留在石墨烯薄膜上，并且在以下情况下可提高产品产率： 生产成本受到控制。