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公开(公告)号:US20240105552A1
公开(公告)日:2024-03-28
申请号:US18162451
申请日:2023-01-31
Applicant: Delphi Technologies IP Limited
Inventor: Kevin M. Gertiser , Chris Fruth
IPC: H01L23/473 , H01L23/467 , H05K7/20
CPC classification number: H01L23/473 , H01L23/467 , H05K7/209 , H05K7/20927
Abstract: A power module includes: a fin housing including a fluid passage; a power switch having an exterior surface; and a fin system comprising a plurality of fins attached to a base plate, the plurality of fins extending from the base plate and away from the exterior surface of the power switch, the fin system being in thermal connection with the exterior surface of the power switch and disposed within the fluid passage.
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公开(公告)号:US20240105533A1
公开(公告)日:2024-03-28
申请号:US18175133
申请日:2023-02-27
Applicant: Delphi Technologies IP Limited
Inventor: David Paul Buehler , Kevin M. Gertiser , David W. Ihms , Mark Wendell Gose
IPC: H01L23/15 , H01L23/00 , H01L23/373
CPC classification number: H01L23/15 , H01L23/3735 , H01L24/32 , H01L2224/32225
Abstract: A power module includes: a first substrate having an outer surface and an inner surface; a semiconductor die coupled to the inner surface of the first substrate; a second substrate having an outer surface and an inner surface, the semiconductor die being coupled to the inner surface of the second substrate; and a first electrically conductive spacer coupled to inner surface of the first substrate and to the inner surface of the second substrate.
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公开(公告)号:US11557992B2
公开(公告)日:2023-01-17
申请号:US17321020
申请日:2021-05-14
Applicant: DELPHI TECHNOLOGIES IP LIMITED
Inventor: Raquib Buksh , Kevin M. Gertiser , Ihab Nahlus , Tushar Nachnani , Ronald M. Shearer , Mitchell Cohen , Spandana V. Barre
Abstract: A method for phase-voltage based motor period measurement includes generating a commanded phase voltage and applying the commanded phase voltage to a first phase voltage input of an electric motor, a second phase voltage input of the electric motor, and a third phase voltage input of the electric motor, measuring a first period of a phase voltage associated with the first phase voltage input and the second phase voltage input and comparing the measured first period to a frequency of the commanded phase voltage, and, in response to a determination that the measured first period of the phase voltage associated with the first phase voltage input and the second phase voltage input is outside of a range of the frequency associated with the commanded phase voltage, identifying a fault associated with the first integrated circuit or signal path.
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