公开(公告)号：US20160292575A1

公开(公告)日：2016-10-06

申请号：US15168084

申请日：2016-05-29

Applicant: Intel Corporation

Inventor： John C. Weast ,  Joshua J. Ratcliff ,  Rita H. Wouhaybi ,  Adam Jordan ,  Charles C. Smith ,  Glen J. Anderson ,  John B. Vicente ,  Lama Nachman

IPC: G06N5/02 ,  H04W4/00

CPC classification number: G06N5/027 ,  G06F1/163 ,  G06F3/011 ,  G06N5/02 ,  G06N7/00 ,  H04W4/80

Abstract: Embodiments of apparatus and methods for capturing and generating user experiences are described. In embodiments, an apparatus may include a processor. The apparatus may also include a data storage module, coupled with the processor, to store sensor data collected by a plurality of sensors attached to one or more devices. The apparatus may further include an experience correlation module, coupled with the data storage module, to associate at least a portion of the sensor data with a user experience based at least in part on one or more rules identifying the user experience, to enable regenerating at least a part of the user experience for a user based at least in part on the portion of the sensor data. Other embodiments may be described and/or claimed.

公开(公告)号：US09355356B2

公开(公告)日：2016-05-31

申请号：US14128564

申请日：2013-10-25

Applicant: INTEL CORPORATION

Inventor： John C. Weast ,  Joshua J. Ratcliff ,  Rita H. Wouhaybi ,  Adam Jordan ,  Charles C. Smith ,  Glen J. Anderson ,  John B. Vicente ,  Lama Nachman

IPC: G06N5/02 ,  H04W4/00

CPC classification number: G06N5/027 ,  G06F1/163 ,  G06F3/011 ,  G06N5/02 ,  G06N7/00 ,  H04W4/80

Abstract: Embodiments of apparatus and methods for capturing and generating user experiences are described. In embodiments, an apparatus may include a processor. The apparatus may also include a data storage module, coupled with the processor, to store sensor data collected by a plurality of sensors attached to one or more devices. The apparatus may further include an experience correlation module, coupled with the data storage module, to associate at least a portion of the sensor data with a user experience based at least in part on one or more rules identifying the user experience, to enable regenerating at least a part of the user experience for a user based at least in part on the portion of the sensor data. Other embodiments may be described and/or claimed.

Abstract translation: 描述用于捕获和产生用户体验的设备和方法的实施例。 在实施例中，装置可以包括处理器。 该装置还可以包括与处理器耦合的数据存储模块，以存储由附接到一个或多个设备的多个传感器收集的传感器数据。 该装置还可以包括与数据存储模块耦合的体验相关模块，至少部分地基于标识用户体验的一个或多个规则将传感器数据的至少一部分与用户体验相关联，以使得能够在 至少部分地基于传感器数据的部分，针对用户的至少一部分用户体验。 可以描述和/或要求保护其他实施例。

公开(公告)号：US20160091337A1

公开(公告)日：2016-03-31

申请号：US14497021

申请日：2014-09-25

Applicant: Intel Corporation

Inventor： John C. Weast ,  Lenitra M. Durham ,  Giuseppe Raffa

IPC: G01C21/36

CPC classification number: G01C21/3697 ,  A61B5/02438 ,  G01C21/3453 ,  G01C21/3461

Abstract: Various systems and methods for improving map and navigation data are described herein. An electronic navigation system for improving map and navigation data comprises a database access module to access a database of physiological information to obtain a biometric value, the biometric value associated with a location and a time; a processing module to determine whether the biometric value violates a threshold; and a display module to display a notification on a map when the threshold is violated, the map including an area around the location associated with the biometric value, and the notification displayed proximate to the location associated with the biometric value.

Abstract translation: 本文描述了用于改进地图和导航数据的各种系统和方法。 一种用于改进地图和导航数据的电子导航系统，包括数据库访问模块，用于访问生理信息数据库以获得生物特征值，与位置和时间相关的生物特征值; 处理模块，用于确定所述生物特征值是否违反阈值; 以及显示模块，用于当违反阈值时在地图上显示通知，所述地图包括与生物测定值相关联的位置周围的区域，以及靠近与生物测定值相关联的位置显示的通知。

公开(公告)号：US12056788B2

公开(公告)日：2024-08-06

申请号：US17684187

申请日：2022-03-01

Applicant: Intel Corporation

Inventor： Abhishek R. Appu ,  Altug Koker ,  Linda L. Hurd ,  Dukhwan Kim ,  Mike B. Macpherson ,  John C. Weast ,  Feng Chen ,  Farshad Akhbari ,  Narayan Srinivasa ,  Nadathur Rajagopalan Satish ,  Joydeep Ray ,  Ping T. Tang ,  Michael S. Strickland ,  Xiaoming Chen ,  Anbang Yao ,  Tatiana Shpeisman

IPC: G06T1/20 ,  G06F3/14 ,  G06F9/30 ,  G06F9/38 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084 ,  G06T15/00 ,  G09G5/36 ,  G06T15/04

CPC classification number: G06T1/20 ,  G06F3/14 ,  G06F9/3001 ,  G06F9/30014 ,  G06F9/3017 ,  G06F9/3887 ,  G06F9/3895 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N3/084 ,  G06T15/005 ,  G09G5/363 ,  G06F9/3851 ,  G06T15/04 ,  G09G2360/06 ,  G09G2360/08 ,  G09G2360/121

Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a mixed precision core including mixed-precision execution circuitry to execute one or more of the mixed-precision instructions to perform a mixed-precision dot-product operation comprising to perform a set of multiply and accumulate operations.

公开(公告)号：US11797837B2

公开(公告)日：2023-10-24

申请号：US15494971

申请日：2017-04-24

Applicant: Intel Corporation

Inventor： Altug Koker ,  Abhishek R. Appu ,  Kamal Sinha ,  Joydeep Ray ,  Balaji Vembu ,  Elmoustapha Ould-Ahmed-Vall ,  Sara S. Baghsorkhi ,  Anbang Yao ,  Kevin Nealis ,  Xiaoming Chen ,  John C. Weast ,  Justin E. Gottschlich ,  Prasoonkumar Surti ,  Chandrasekaran Sakthivel ,  Farshad Akhbari ,  Nadathur Rajagopalan Satish ,  Liwei Ma ,  Jeremy Bottleson ,  Eriko Nurvitadhi ,  Travis T. Schluessler ,  Ankur N. Shah ,  Jonathan Kennedy ,  Vasanth Ranganathan ,  Sanjeev Jahagirdar

IPC: G06N3/08 ,  G06N20/00 ,  G06N3/063 ,  G06N3/044 ,  G06N3/045 ,  G06N3/048

CPC classification number: G06N3/08 ,  G06N3/044 ,  G06N3/045 ,  G06N3/063 ,  G06N20/00 ,  G06N3/048

Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.

公开(公告)号：US20230334316A1

公开(公告)日：2023-10-19

申请号：US18314450

申请日：2023-05-09

Applicant: Intel Corporation

Inventor： Altug Koker ,  Abhishek R. Appu ,  Kamal Sinha ,  Joydeep Ray ,  Balaji Vembu ,  Elmoustapha Ould-Ahmed-Vall ,  Sara S. Baghsorkhi ,  Anbang Yao ,  Kevin Nealis ,  Xiaoming Chen ,  John C. Weast ,  Justin E. Gottschlich ,  Prasoonkumar Surti ,  Chandrasekaran Sakthivel ,  Farshad Akhbari ,  Nadathur Rajagopalan Satish ,  Liwei Ma ,  Jeremy Bottleson ,  Eriko Nurvitadhi ,  Travis T. Schluessler ,  Ankur N. Shah ,  Jonathan Kennedy ,  Vasanth Ranganathan ,  Sanjeev Jahagirdar

IPC: G06N3/08 ,  G06N20/00 ,  G06N3/063 ,  G06N3/044 ,  G06N3/045

CPC classification number: G06N3/08 ,  G06N20/00 ,  G06N3/063 ,  G06N3/044 ,  G06N3/045 ,  G06N3/048

Abstract: Described herein is a graphics processor comprising a memory device and a graphics processing cluster coupled with the memory device. The graphics processing cluster includes a plurality of graphics multiprocessors interconnected via a data interconnect. A graphics multiprocessor includes circuitry configured to load a modular neural network including a plurality of subnetworks, each of the plurality of subnetworks trained to perform a computer vision operation on a separate subject.

公开(公告)号：US20220357742A1

公开(公告)日：2022-11-10

申请号：US17750917

申请日：2022-05-23

Applicant: Intel Corporation

Inventor： Abhishek R. Appu ,  Altug Koker ,  Joydeep Ray ,  Balaji Vembu ,  John C. Weast ,  Mike B. Macpherson ,  Dukhwan Kim ,  Linda L. Hurd ,  Sanjeev Jahagirdar ,  Vasanth Ranganathan

IPC: G05D1/00 ,  G06N3/063 ,  G06F9/52 ,  G06N3/04 ,  G06N3/08

Abstract: A mechanism is described for facilitating barriers and synchronization for machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting thread groups relating to machine learning associated with one or more processing devices. The method may further include facilitating barrier synchronization of the thread groups across multiple dies such that each thread in a thread group is scheduled across a set of compute elements associated with the multiple dies, where each die represents a processing device of the one or more processing devices, the processing device including a graphics processor.

公开(公告)号：US11487811B2

公开(公告)日：2022-11-01

申请号：US16696854

申请日：2019-11-26

Applicant: Intel Corporation

Inventor： Barnan Das ,  Mayuresh M. Varerkar ,  Narayan Biswal ,  Stanley J. Baran ,  Gokcen Cilingir ,  Nilesh V. Shah ,  Archie Sharma ,  Sherine Abdelhak ,  Praneetha Kotha ,  Neelay Pandit ,  John C. Weast ,  Mike B. MacPherson ,  Dukhwan Kim ,  Linda L. Hurd ,  Abhishek R. Appu ,  Altug Koker ,  Joydeep Ray

IPC: G06F16/583 ,  G06F16/783 ,  G06K9/62 ,  G06V10/94 ,  G06V40/10 ,  G06V40/20

Abstract: A mechanism is described for facilitating recognition, reidentification, and security in machine learning at autonomous machines. A method of embodiments, as described herein, includes facilitating a camera to detect one or more objects within a physical vicinity, the one or more objects including a person, and the physical vicinity including a house, where detecting includes capturing one or more images of one or more portions of a body of the person. The method may further include extracting body features based on the one or more portions of the body, comparing the extracted body features with feature vectors stored at a database, and building a classification model based on the extracted body features over a period of time to facilitate recognition or reidentification of the person independent of facial recognition of the person.

公开(公告)号：US20220230271A1

公开(公告)日：2022-07-21

申请号：US17716588

申请日：2022-04-08

Applicant: Intel Corporation

Inventor： Tao Zhao ,  John C. Weast ,  Brett P. Wang

IPC: G06T1/20 ,  G06F9/48 ,  G06F9/451

Abstract: Systems and methods for determining a foreground application and at least one background application from multiple graphics applications executing within an execution environment are disclosed. Pixel data rendered by the foreground application may be displayed in the execution environment while a rendering thread of the background application may be paused.

公开(公告)号：US20210279571A1

公开(公告)日：2021-09-09

申请号：US17177632

申请日：2021-02-17

Applicant: Intel Corporation

Inventor： Narayan Srinivasa ,  Joydeep Ray ,  Nicolas C. Galoppo Von Borries ,  Ben J. Ashbaugh ,  Prasoonkumar Surti ,  Feng Chen ,  Barath Lakshmanan ,  Elmoustapha Ould-Ahmed-Vall ,  Liwei Ma ,  Linda L. Hurd ,  Abhishek R. Appu ,  John C. Weast ,  Sara S. Baghsorkhi ,  Justin E. Gottschlich ,  Chandrasekaran Sakthivel ,  Farshad Akhbari ,  Dukhwan Kim ,  Altug Koker ,  Nadathur Rajagopalan Satish

IPC: G06N3/08 ,  G06N3/04

Abstract: An apparatus to facilitate optimization of a neural network (NN) is disclosed. The apparatus includes optimization logic to define a NN topology having one or more macro layers, adjust the one or more macro layers to adapt to input and output components of the NN and train the NN based on the one or more macro layers.